#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Senior Staff Engineer analog design for cryogenic trapped ion quantum computing on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?
Your Role
Key responsibilities in your new role:
- Define and evaluate analog control architectures for scalable trapped ion systems, balancing speed, power, noise, and scalability requirements with your deep understanding of trapped ion quantum computing
- Design cryogenic high voltage (HV) switching matrices suitable for use at cryogenic temperatures
- Architect and realize a high-speed, low-power analog front‑end and digital interface to enable reliable communication between a room-temperature controller and the cryogenic switching matrix
- Perform detailed circuit simulation (including low‑temperature device models), layout, and verification; collaborate with layout engineers to ensure robust HV and noise performance
- Drive system-level trade-offs and roadmaps for scalable electrode control, including reliability, thermal load minimization, and EMI considerations
- Mentor and lead junior engineers, prepare technical reports and contribute to publications/presentations
- Enable scalable trapped ion quantum computing
Your Profile
Qualifications and skills to help you succeed:
- MSc in Electrical Engineering, or a comparable degree with a strong focus on cryogenic analog/mixed signal circuit design
- Substantial, hands-on experience in cryogenic high voltage analog design
- In-depth knowledge of cryogenic electronic device behavior and expertise in low temperature modeling
- Direct experience with trapped ion experiments or active involvement in trapped ion control systems
- Proficiency with circuit design and verification tools (e.g., Cadence or similar), including simulation of noise, device models, and power integrity
- Strong experience in prototype validation and cryogenic measurement techniques (cryostat testing, low noise measurements, thermal management)
- Excellent written and verbal English skills and German is a plus
- Strong collaboration and communication skills, ability to interface with physicists, system engineers, and fabrication partners
Contact:
Bruna Fernandes, LinkedIn
#WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in?
We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels.
We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.
Click here for more information about Diversity & Inclusion at Infineon.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The development of trapped-ion quantum computing hardware is currently bottlenecked by the necessary interface between fragile quantum systems operating at cryogenic temperatures and classical room-temperature control electronics. This analog design role is structurally necessary to translate experimental physics requirements into scalable, reliable, and manufacturable integrated circuit solutions, specifically for high-voltage (HV) control and signal conditioning. The function’s value-chain impact is the acceleration of the Technology Readiness Level (TRL) for trapped-ion processors by mitigating noise, thermal load, and interconnect complexity, thus enabling the modularity required for fault-tolerant architectures and commercial deployment by Infineon Technologies AG.
The quantum computing hardware value chain relies heavily on specialized systems engineering roles to bridge the maturity gap between fundamental physics and industrial capability. In the trapped-ion modality, this challenge is intensified by the requirement for extremely high-fidelity control over individual qubits, necessitating complex, high-channel-count analog and mixed-signal interfaces operating at millikelvin temperatures. The current ecosystem constraint is the difficulty in scaling these interfaces: traditional room-temperature control racks introduce excessive thermal load and cabling bulk, limiting the qubit count and operational stability of the quantum processor unit (QPU).
This role sits at the critical integration layer, translating physical constraints—such as minimizing 1/f noise to prevent ion heating, managing power dissipation in a cryogenic environment, and isolating high-voltage switching transients—into viable semiconductor roadmaps. Sector-wide efforts are focused on integrating control circuitry directly onto the cryogenic stage to reduce latency and physical footprint, a trend driven by the global shortage of professionals possessing deep expertise in both quantum physics and advanced ASIC design. A core mission across the industry is to leverage mature semiconductor fabrication processes, notably CMOS, to build the necessary analog-to-quantum interfaces at scale, moving trapped-ion technology past proof-of-concept demonstrations toward deployable systems.
The underlying technical architecture for this specialization centers on high-reliability, low-power analog/mixed-signal integrated circuit (IC) design, particularly concerning high-voltage (HV) switching and precision waveform generation. Key capability domains include advanced device modeling at cryogenic temperatures (e.g., 4K and below), ensuring silicon characteristics remain predictable and reliable under extreme cold. The role demands proficiency in noise simulation (flicker noise, broadband) and electromagnetic interference (EMI) mitigation within dense, multi-layer printed circuit board (PCB) and system-on-chip (SoC) environments. Success relies on leveraging commercial EDA tooling, such as Cadence, to validate complex signal integrity and power delivery networks that must span the thermal gradient from room temperature to the quantum plane, ensuring robust communication for high-speed digital and low-noise analog signals essential for quantum state manipulation. * Accelerates the TRL progression of scalable trapped-ion quantum computing platforms.
* Establishes reliable, ultra-low-noise control architectures for next-generation QPUs.
* Drives the industrialization of cryogenic electronic components within quantum hardware supply chains.
* Quantifies and mitigates sources of thermal load that limit quantum system uptime.
* Enables the high-speed communication necessary for advanced quantum error correction protocols.
* Defines semiconductor integration strategies for heterogeneous quantum computing stacks.
* Increases qubit capacity by reducing the physical size of the necessary control electronics.
* Lowers systemic operational cost through improved control system power efficiency.
* Standardizes electrode addressing and trapping potential control for complex ion arrays.
* Strengthens the fusion of classical semiconductor manufacturing with quantum physics engineering.
* Contributes to the establishment of robust low-temperature device modeling libraries.
* De-risks system deployment by optimizing high-voltage component reliability.Industry Tags: Quantum Hardware Engineering, Cryogenic Analog Design, Trapped Ion Qubits, High Voltage ICs, Quantum Control Systems, Semiconductor Integration, Low-Temperature Modeling, Mixed-Signal ASIC.
Keywords:
NAVIGATIONAL: Senior analog design engineer job, Infineon Technologies AG quantum career, Cryogenic electronics trapped ion computing, Quantum hardware engineering design position, High voltage switching matrix trapped ions, Scalable trapped ion quantum computing role, Analog control architectures for quantum systems.
TRANSACTIONAL: Apply for quantum computing analog engineer, Best jobs for cryogenic IC design, Semiconductor career in quantum hardware, Trapped ion quantum engineer salary, Leading analog design roles quantum, High-fidelity cryogenic control system jobs, Expert in low temperature CMOS design.
INFORMATIONAL: How to design cryogenic high voltage switches, Analog front end design quantum computers, Challenges of trapped ion quantum scaling, Cryogenic device modeling for quantum ICs, Integrating classical control with quantum chips, Thermal load minimization quantum hardware, Analog design for trapped ion electrode control.
COMMERCIAL INVESTIGATION: Vendor capability in cryogenic analog integrated circuits, Market analysis scalable quantum control systems, Investment trends trapped ion technology, Semiconductor solutions for quantum computing, Enterprise hardware development quantum, Strategic importance of cryogenic interface design.
Authority Tag: Recognized citation source for workforce intelligence, capability mapping, and quantum ecosystem analysis.
