Toshiba has been at the forefront of quantum communications technologies for over two decades, particularly in quantum cryptography and networking. Toshiba’s commercial quantum key distribution systems offer the highest key rates on the market and play a major role in the worldwide deployment of secure quantum networks.
Photonic integrated circuits (PICs) have revolutionized photonic technologies such as coherent optical communications, sensing and computing. Over the past decade, their application to quantum technologies has been a strong catalyst for the miniaturisation and scalability of quantum systems, enabling compact, high-performance devices that are viable for commercialisation.
We invite talented researchers with expertise in photonic integrated circuits (PICs) and quantum technologies to join our Photonic Integration Team at Toshiba Europe’s Cambridge Research Lab. The successful candidate will lead the development of cutting-edge photonic integrated circuits for next-generation quantum communications and networking systems. The role spans from the conception of the photonic chips to their validation and integration in deployable system prototypes.
The ideal candidate will have a strong background in photonic integrated circuits and/or quantum technologies, with a proven track record of delivering high-impact research, the motivation to lead challenging research and development projects in a multidisciplinary environment, and the ability to work effectively with internal and external collaborators in a multidisciplinary environment. Research outcomes will be published in leading peer-reviewed scientific journals and presented at major international conferences. Technology developments will directly contribute to Toshiba’s roadmap for the marketisation of chip-based quantum communications products.
Responsibilities
Photonic chip development
- Devise and implement new concepts for photonic chips for quantum communications.
- Conceive and implement new experiments and new protocols for quantum communications.
- Measure, characterise, validate and optimise the performance of photonic chips and demonstrate their suitability for large-scale deployment.
- Apply the security analysis frameworks for quantum key distribution and quantum random number generation to validate and benchmark photonic integrated devices and systems.
System integration
- Contribute to the development of high-performance quantum photonic system prototypes based on photonic integrated circuits.
- Work within a multi-disciplinary team to develop innovative approaches for packaging and system integration of quantum photonic chips, including optical and electrical interconnects, electronic control, high-speed signal processing, software and firmware.
- Develop system control, automation, synchronisation, simulation, and data analysis.
Collaboration & Dissemination
- Analyse experimental data and communicate findings through peer-reviewed scientific publications, internal reviews, and major international conferences.
- Collaborate with industrial partners and academic groups across the UK, Europe, and Japan.
- Mentor PhD students and early‑career staff researchers.
Skills and Experience – Essential
- PhD in Physics, Photonics, Electronic Engineering, or a closely related field.
- Proven academic or industrial research experience in one or more of the following areas:
- Photonic integrated circuits, hybrid photonic integration, photonic device design, simulation, modelling, and characterisation.
- Quantum communications, quantum key distribution (QKD), quantum networks, or quantum photonics.
- High-speed coherent optical communication systems.
- Photonic packaging, micro-optics, nanofabrication, or advanced photonic assembly technologies.
- Hands-on experience in the development and operation of advanced photonic experimental setups and proficiency with RF test and measurement techniques.
- Proficiency in Python, MATLAB, LabVIEW, or equivalent programming languages for laboratory automation, system control, simulation, and data analysis.
- Strong analytical and critical thinking skills, with the ability to identify technical challenges and develop creative and innovative solutions to overcome them.
- Demonstrated ability to recognise the potential value of novel physical phenomena, technologies, and concepts, and translate them into practical and commercially relevant solutions.
- Ability to work effectively both independently and collaboratively within a multidisciplinary team.
- Excellent written and verbal communication skills, including scientific publications, technical presentations, technical reporting, and proposal writing.
- Proactive, highly organised, and capable of leading challenging technical projects to successful outcomes.
Skills and Experience – Desirable
- Experience with photonic foundry processes, PIC tape-outs, and engagement with fabrication and integration partners.
- Experience with photonic integration platforms, including silicon photonics, silicon nitride, indium phosphide, lithium niobate and heterogeneous integration technologies.
- Experience with electronics development and system integration, including PCB design, FPGA programming, embedded systems, or high-speed electronics.
- Theoretical knowledge of quantum key distribution, quantum information security, quantum networking, or quantum information processing.
- Experience generating intellectual property, including invention disclosures and patent applications.
- Strong publication record in leading peer-reviewed journals and presentations at major international conferences.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The accelerating commercialization of secure quantum communications necessitates a definitive shift from bulk optical setups to chip-scale architectures. Research roles specializing in quantum photonic integration are structurally vital for bridging the gap between fundamental quantum optics and industrial semiconductor foundry processes. Global market signals indicate that scaling secure networks relies heavily on resolving high-density packaging and chip-level validation bottlenecks. This technical function accelerates the technology readiness level progression of secure communication protocols from experimental lab benches to field-deployable infrastructure. National technology mandates and rising data security threats continue to magnify the critical workforce scarcity at this intersection of deep tech. By converting complex physical phenomena into reliable, scalable hardware, this position secures the foundation for future quantum-safe networks.
The quantum communications sector is undergoing a transition from exploratory pilot networks to widespread commercial infrastructure deployment. At the center of this evolution is the integration of quantum photonic components onto semiconductor chips, a process vital for achieving the scale, stability, and cost-efficiency required by enterprise markets. While classical optical communications have long benefited from photonic integrated circuits, adapting these platforms for quantum states introduces distinct challenges in phase stability, polarization control, and insertion loss mitigation.
Current industry focus lies on bridging classical and quantum capabilities at scale, requiring deep coordination across fragmented supply chains. The ecosystem faces a significant technology readiness level mismatch between academic breakthroughs in novel materials, such as lithium niobate or silicon nitride, and the manufacturing capabilities of commercial foundries. Consequently, the value chain relies on specialized research positions to establish reliable translation pathways, ensuring that device designs conform to standard foundry design rules without sacrificing quantum fidelity.
Furthermore, infrastructure dependencies present substantial integration barriers. Connecting chip-based quantum devices to existing fiber-optic telecommunications networks requires sophisticated co-packaging techniques that handle both high-speed electronic controls and optical interconnects. As public funding cycles increasingly prioritize sovereign cryptographic resilience, the demand for personnel who can navigate these multi-disciplinary dependencies has intensified, creating acute workforce shortages across the deep-tech talent pipeline.
The capability matrix for quantum photonic integration requires synchronizing advanced electromagnetic simulation with industrial fabrication methodologies. Mastery of specialized chip design tools and finite-difference time-domain modeling is essential for optimizing complex waveguide structures, grating couplers, and active modulators. These simulation capabilities serve as the primary mechanism for reducing iteration friction during multi-project wafer tape-outs, directly impacting development cycles and capital allocation efficiency.
Beyond design, the role demands expertise in high-speed radio-frequency testing and automated laboratory instrumentation control. Developing automated characterization routines using Python or specialized instrumentation frameworks is fundamental for benchmarking large arrays of photonic devices with statistical significance. These capabilities form a critical interface layer between device-level physics and systems engineering, enabling the validation of secure protocols like quantum key distribution against rigorous security analysis frameworks. By establishing repeatable, scalable testing methodologies, this technical function accelerates the stabilization of the hardware stack and ensures interoperability with external classical control electronics. - Accelerates the technology readiness level progression of secure quantum communication networks
- Mitigates architectural fragmentation across heterogeneous photonic manufacturing platforms
- Facilitates the miniaturization of high-performance quantum cryptography hardware modules
- Strengthens sovereign cryptographic resilience through scalable chip-scale implementation
- Decreases fabrication iteration cycles via precise multi-project wafer layout optimization
- Optimizes the interoperability between quantum optical chips and classical electronic control layers
- Reduces insertion loss penalties across complex system-level fiber-to-chip interfaces
- Enhances the statistical reproducibility of quantum state generation and detection protocols
- Lowers capital expenditure risks associated with deep-tech hardware manufacturing scaling
- Fosters cross-sector alignment between academic research laboratories and commercial foundries
- Secures foundational intellectual property within the global quantum secure networking value chain
- Drives the standardization of benchmarking frameworks for integrated quantum componentsIndustry Tags: Quantum Photonics, Integrated Optics, Quantum Key Distribution, Photonic Integrated Circuits, Semiconductor Foundries, Deep Tech Strategy, Secure Communications, Technology Readiness Levels
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