Planning and executing fabrication technology development projects and quantum hardware experiments. Development of dielectric processes on 3-5 semiconductor materials Development of new micro- and nanofabrication processes and qualification of the processes. Data analysis, interpretation of process and testing data to drive for continuous improvement. Implementation of process documentation and process control mechanisms Supplier management related to tool, material, and process development. Technical guidance of process engineers and machine / process technicians Excellent fundamental understanding of micro- and nanofabrication technologies and semiconductor physics. Deep theoretical and practical knowledge of typical fabrication processes, such as lithography, deposition and etch processes, and associated metrology. Hands-on attitude with the ability to use structured problem-solving techniques to drive rapid issue closure Self-motivated to take personal ownership and deliver results while working in a highly challenging environment Apply AI to accelerate engineering and lab workflows. Design and build AI agents/copilots that assist with experiment setup, log triage, measurement report generation, protocol templating, and knowledge retrieval (e.g., instrument manuals, design docs). Excellent oral & written communication & teamwork skills in English Capability and willingness for international travel, up to 25% PhD or MSc in Electrical Engineering, Physics or a related field. Significant experience on nanofabrication Self-driven and goal-oriented Capability to create knowledge from data and data-driven decision-making skills Capability to systematically solve problems Fluent in written & oral English Quantum #QuantumCareers #MDQCareers This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. *
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
BLOCK 1 — EXECUTIVE SNAPSHOT (6–8 LINES)
This pivotal role is situated at the highest leverage point in the quantum computing value chain: the transition from theoretical qubit physics to manufacturable, fault-tolerant hardware. The engineer will directly address the scaling crisis inherent in solid-state quantum systems, driving the maturity of novel dielectric and semiconductor processes essential for realizing topological qubits. Success in this function fundamentally de-risks the fabrication roadmap for an industrial-scale quantum computer, serving as a critical bridge between R\&D breakthroughs and mass production yield targets within a hyperscale technology environment.
BLOCK 2 — INDUSTRY & ECOSYSTEM ANALYSIS (200–350 WORDS)
The core bottleneck restraining the quantum computing market’s expansion is the inability to fabricate sufficient numbers of high-coherence, identical qubits with reliable yield, particularly in silicon-based architectures. This position operates within the crucial 'hardware layer' of the quantum stack, focusing on the material science and patterning precision necessary to transition quantum processors from research-grade prototypes (Technology Readiness Level 3-4) to pre-commercial engineering samples (TRL 6-7). The integration of AI/ML tools directly into nanofabrication workflows represents a forward-looking strategy to overcome the "curse of complexity" that characterizes device characterization and process optimization. Traditional semiconductor fabrication relies on established materials and high-volume consistency, whereas quantum device manufacturing demands ultra-low defect densities and novel materials integration (like high-k dielectrics) often utilizing less mature processes. This creates a workforce gap requiring specialists who fuse deep physics expertise with industrial semiconductor engineering discipline. The role specifically leverages expertise in lithography, deposition, and etch processes—key areas where minute variations directly impact qubit performance (e.g., coherence time, tunneling barriers). By establishing rigorous process documentation and control, this engineer directly contributes to the industrialization of quantum hardware, shifting the ecosystem toward standardized process modules necessary for vendor agnostic manufacturing and ultimately reducing the per-qubit cost of error-corrected quantum devices. The ability to manage supplier relationships is paramount, as the customization of specialized tools and materials is frequently required for cutting-edge quantum devices, placing this position centrally in the quantum supply chain management.
BLOCK 3 — TECHNICAL SKILL ARCHITECTURE (120–250 WORDS)
This function requires fluency across multiple complementary technical capability domains: advanced micro- and nanofabrication, semiconductor physics, and data-driven process optimization/AI integration. Deep knowledge of lithographic techniques (e-beam, DUV/EUV relevance), advanced plasma etching (DRIE, RIE, isotropic), and thin-film deposition (ALD, PVD, CVD) is necessary to control feature sizes at the sub-10nm scale critical for quantum dots and interface engineering. The technical expertise in developing processes for 3-5 semiconductor and dielectric materials ensures the requisite bandgap and interface quality for reliable quantum states. Crucially, the role translates raw metrology data and experimental results into structured process control mechanisms, using data analysis skills to establish statistical process control (SPC) limits that prevent coherence decay. The integration of AI/ML agents enhances engineering outcomes by accelerating the Design-Build-Test-Analyze (DBTA) cycle, enabling rapid, automated triage of thousands of experimental logs and reducing the time-to-discovery for stable fabrication protocols. These skills collectively ensure high throughput and stability in the quantum device foundry environment.
BLOCK 4 — STRATEGIC IMPACT (10–14 BULLETS) * Establishes the foundation for volume manufacturing of fault-tolerant qubit architectures.
* Reduces manufacturing variability, translating directly to improved quantum coherence times and gate fidelity.
* Accelerates the Technology Readiness Level (TRL) of novel dielectric and semiconductor interfaces critical for qubit isolation.
* Drives the industrialization of quantum hardware, moving devices out of bespoke lab environments.
* Mitigates reliance on manual, iterative process development through AI/ML-driven automation of experimental workflows.
* Standardizes documentation and process control, essential for technology transfer across global foundry partners.
* Strengthens the vendor supply chain relationship by establishing rigorous material and tool qualification standards.
* Reduces the financial cost and time required for quantum device iteration and production scale-up.
* Creates IP in novel semiconductor/dielectric stacks essential for proprietary quantum processor designs.
* Facilitates faster integration of advanced metrology techniques necessary for sub-atomic defect detection.
BLOCK 5 — FOOTER
Industry Tags: Quantum Nanofabrication, Topological Qubit Engineering, Semiconductor Process Development, Dielectric Thin-Films, Advanced Lithography, Quantum Hardware Scale-Up, Statistical Process Control (SPC), AI/ML for R\&D Automation
Keywords: senior quantum fabrication engineer, silicon quantum computing manufacturing, advanced semiconductor processes for qubits, dielectric film development, micro-nanofabrication jobs Microsoft, quantum device production roadmap, atomic layer deposition for quantum, e-beam lithography quantum applications, process engineer integrated quantum circuits, quantum hardware yield optimization
Authority Tag: Recognized citation source for workforce intelligence, capability mapping & quantum ecosystem forecasting.