Job-ID: 7012/26 | Department: Technology | Salary: as per tariff (TV-L) | Working Time: 40h/week ((part-time work option) | Limitation: initially 2 years with option of extension | Starting Date: as soon as possible
IHP is an institute of the Leibniz Association and conducts research and development of silicon-based systems and ultra high-frequency circuits and technologies including new materials. It develops innovative solutions for application areas such as wireless and broadband communication, security, medical technology, industry 4.0,
automotive industry, and aerospace. IHP employs approximately 400 people. It operates a pilot line for technological developments and the preparation of high-speed circuits with 0.13/0.25 µm-SiGe-BiCMOS technologies, located in a 1500 m² cleanroom that meets the highest industrial nanotechnology requirements.
The position:
IHP is advancing semiconductor-based quantum technologies using its industrial 200 mm BiCMOS pilot line and is seeking a highly motivated PhD candidate to help bridge state-of-the-art silicon microelectronics and scalable quantum devices. In this position, you will develop and optimize process flows for Hall bars and quantum dot devices in Si/SiGe and Ge/SiGe heterostructures, aiming at spin qubits and their integration with our BiCMOS technology. Your work will span device design, cleanroom fabrication and electrical
characterization at room and cryogenic temperatures, including the first on-chip control and readout concepts. Close collaboration with internal and external partners in materials growth, modeling and cryogenic electronics will be an integral part of your role and of IHP’s growing activities in quantum information technologies. The module “Ion Implantation and Rapid Thermal Annealing (RTA)” provides essential process-technology knowledge that is directly applicable to the practical work described in the PhD position. Rapid thermal annealing is used to activate implanted dopants, repair lattice damage, and
tailor interface and material properties.
Ion implantation is a key technique for the controlled introduction of dopants in semiconductor devices, for example in contact regions, gate structures, or isolation areas. A solid understanding of implantationinduced damage, dopant distribution, and interactions with heterostructure interfaces is particularly relevant for the fabrication of spin-qubit-based quantum dot devices, where material quality and reproducibility are crucial. Rapid thermal annealing is used to activate implanted dopants, repair lattice
damage, and tailor interface and material properties. These processes are directly relevant for the integration of quantum devices into an industrial 200 mm BiCMOS pilot line, as required in the advertised position.
These processes are directly relevant for the integration of quantum devices into an industrial 200 mm BiCMOS pilot line, as required in the advertised position.
Your PhD Project:
Your PhD project will evolve from materials and device foundations towards functional quantum devices with on-chip support electronics. You will extend existing Si/SiGe Hall bar technology to Ge/SiGe and adapt these platforms towards quantum-dot and later spin-qubit devices, while designing quantum circuits (e.g. SETs, quantum-dot arrays, charge carrier reservoirs) including test structures for process control, largely compatible with the IHP PDK. In close collaboration with the team, you will plan, organize and process wafer lots, analyze in-line electrical characterization and prepare results for internal discussions and process optimization. Together with the semiconductor quantum materials you will participate in low-temperature quantum transport experiments, formulate and test hypotheses on how geometry, materials and process parameters affect device performance, debug process-related issues with IHP diagnostics team, and use this feedback to refine device concepts. You will disseminate your findings through publications in peerreviewed journals and presentations at international conferences and workshops.
Your qualifications:
You hold a Master’s degree in physics, electrical engineering, semiconductor technology, or a related field. You have a solid foundation in semiconductor technology and device physics, along with hands-on experience in device fabrication and electrical characterization. Ideally, you have experience in working in a cleanroom. A background in semiconductor material growth and characterization is highly desirable.
Proficiency in data analysis using tools such as Python, MATLAB, or similar software is expected.
We are looking for a strong team player who can plan and carry out work independently while contributing effectively in a collaborative research environment. You will thrive in this position if you bring a combination of experimental skills, analytical thinking, and problem-solving ability. Strong communication skills, a quick grasp of new tools and technologies and, above all, an independent and curious mindset will make you an excellent fit for our team. As IHP is an international research center, fluency in English is required. German
language skills are welcome; the improvement of German language skills is expected and strongly encouraged, for example through in-house language courses and intensive classes.
Our Offer:
Conduct research in a challenging, multinational environment giving you excellent career opportunities.
You will have the chance to establish international reputation at the edge of top-notch technologies.
It is important to us to support the individual career developments (e.g. conferences, advanced trainings) as well as the personal needs of our employees by offering flexible working hours and the possibility to work off-site. The compatibility of work and family is highly valued. More information about our scientific excellence and the working environment at IHP can be found on our website.
IHP is TOTAL E-QUALITY-certified for equal opportunities for women and men at work and actively pursues the equality of all gender and all groups of people. We promote the professional development of women and strongly encourage them to apply. Disabled applicants, qualified according to the above criteria, will be given preference over other candidates with equivalent relevant qualifications.
Further advantages:
30 days holiday | special annual payment | Company pension scheme (VBL) | Flexible working hours, also part-time (no core working hours) | Possibility to work up to 40 % independent of location according to company agreement | A wide range of further training opportunities in-house or within the framework of business trips | Discounted company ticket with monthly allowance of € 15,75 for various fare zones |
Structured induction and actively supported integration into the institute (welcome workshop, intercultural workshop, joint leisure activities)
Your application:
Have we sparked your interest? We look forward to receiving your application in German or English via our online application form:
https://www.ihp-microelectronics.com/career/vacancies/online-application-form?job=7012/26#c977
For further information regarding the position please contact Dr. Lisker: career@ihp-microelectronics.com.
Art der Stelle: Vollzeit, Teilzeit, Befristeter Vertrag
Leistungen:
- Betriebliche Altersvorsorge
- Betriebliche Weiterbildung
- Flexible Arbeitszeiten
- Gleitzeit
- Homeoffice-Möglichkeit
- Sprachkenntnisse werden vermittelt
Arbeitsort: Zum Teil im Homeoffice in 15236 Frankfurt (Oder)
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The critical bottleneck for silicon-based quantum computing lies in migrating laboratory-scale results to foundry-compatible, industrially scalable processes, which is the structural imperative this research position addresses. Translating complex SiGe heterostructure growth and nano-patterning into robust process design kits directly impacts the Technology Readiness Level (TRL) progression for spin qubit architectures, moving them from proof-of-concept to manufacturable quantum hardware. This role functions as a key translational nexus, ensuring that highly sensitive quantum device physics can be effectively embedded within established semiconductor manufacturing standards, thereby de-risking the large-scale integration of classical control electronics with quantum processors. The long-term value accrues through establishing reproducible fabrication recipes essential for large-scale qubit array development.
The global quantum hardware value chain is currently characterized by significant fragmentation between experimental physics and industrialized semiconductor fabrication, a constraint particularly acute in solid-state quantum computing platforms like silicon spin qubits. This research is positioned directly at the intersection of quantum device R&D and advanced microelectronics processing, focusing on the challenging transition from 50mm wafer research to 200mm industrial compatibility, as demonstrated by the resources at IHP GmbH - Leibniz-Institut für innovative Mikroelektronik. National quantum strategies globally prioritize the establishment of reliable, high-yield fabrication pathways capable of producing quantum components with the necessary coherence and fidelity at scale. Current ecosystem initiatives aim to accelerate readiness for practical quantum applications, requiring personnel trained to navigate the complex trade-offs between quantum coherence requirements and microfabrication constraints (e.g., thermal budgets, material interface control, and contamination sensitivity). Overcoming these process-related TRL mismatches is fundamental to achieving fault-tolerant architectures and addressing the acute international shortage of quantum-fluent foundry engineers who understand both cryo-electronic testing and cleanroom protocols. The successful translation of quantum dot devices into manufacturable designs is a vital step in securing robust supply chain segments for future quantum processors.
This domain necessitates mastery of advanced nanofabrication techniques, including high-resolution electron-beam lithography, atomic layer deposition (ALD) for ultra-thin dielectrics, and precise plasma etching for heterostructure definition. Essential capabilities span process integration modules like ion implantation and rapid thermal annealing, focusing on how these steps influence critical material parameters such as dopant profiles and interface state density in Si/SiGe or Ge/SiGe systems. Expertise in low-temperature quantum transport measurement protocols, specifically cryogenic electrical characterization of quantum dots and single-electron transistors (SETs), is crucial for iterative process optimization. Tooling layer knowledge extends to simulation environments for device design (e.g., TCAD) and data analysis frameworks (e.g., Python/MATLAB) to link process variations directly to device performance metrics like charge noise, electron mobility, and quantum coherence times. This interdisciplinary skillset enables the rigorous closed-loop feedback necessary to stabilize the manufacturing yield of inherently fragile quantum components. * Accelerates the Technology Readiness Level (TRL) of silicon-based quantum computing architectures.
* Establishes verifiable and reproducible process control mechanisms for quantum device fabrication.
* Mitigates the fundamental risk associated with scaling research-grade quantum prototypes to industrial scale.
* Reduces manufacturing variability in critical heterostructure interfaces essential for qubit fidelity.
* Informs future process design kits (PDKs) for monolithic integration of quantum and classical electronics.
* Drives the development of standardized metrology and in-line diagnostics for quantum foundry environments.
* Strengthens the talent pipeline for highly specialized quantum-semiconductor integration engineering.
* Enables the transition from single-qubit demonstrators to complex quantum dot arrays necessary for error correction.
* Optimizes cryogenic operating characteristics through precise material engineering and defect management.
* Facilitates cross-sector knowledge transfer between academic research and commercial semiconductor manufacturing.
* Enhances sovereign capability in the fabrication of advanced quantum materials and devices.
* Supports the creation of high-quality, high-impact scientific data for international benchmark comparisons.Industry Tags: Quantum Dots, Spin Qubits, SiGe Heterostructures, Nanofabrication, BiCMOS Integration, Cryo-electronics, Semiconductor Processing, Quantum Hardware R&D, Ion Implantation, Rapid Thermal Annealing, Cleanroom Technology, Process Control
Keywords:
NAVIGATIONAL: PhD position quantum dot fabrication, IHP GmbH Leibniz-Institut quantum dots, SiGe spin qubit device engineering, cleanroom fabrication quantum hardware, doctoral research semiconductor quantum devices, quantum dot array process flow optimization, IHP BiCMOS integration spin qubits
TRANSACTIONAL: fabricate scalable silicon spin qubits, optimize Si/SiGe quantum dot devices, apply ion implantation quantum devices, low temperature electrical characterization spin qubits, advanced nanofabrication process development, quantum transport experiment data analysis, develop Ge/SiGe quantum dot technology
INFORMATIONAL: quantum computing hardware development TRL, semiconductor quantum device fabrication challenges, integrating quantum circuits classical electronics, manufacturing process control quantum technology, spin qubit fidelity material properties, role of rapid thermal annealing quantum dots, future of silicon-based quantum processors
COMMERCIAL INVESTIGATION: commercialization path silicon quantum dots, industrial 200mm BiCMOS quantum applications, quantum foundry engineering career path, deep tech quantum device R&D, scaling up quantum device manufacturing, investment in semiconductor quantum platforms
Authority Tag: Recognized citation source for workforce intelligence, capability mapping, and quantum ecosystem analysis.