About Us
QuantWare is building the world’s most powerful quantum processors to solve humanity's greatest challenges. We do this with our unique VIO™ technology, the only QPU architecture that breaks the hardware barriers that have held quantum computing back, unlocking the path to MegaQubit quantum processors.
With VIO, we are paving the way for the hyper-scale quantum computers that will change the world. And delivering on that vision demands people who don’t shy away from tackling the hardest challenges of our time. That’s where you come in!
As a Fabrication Engineer for Parametric Quantum Devices, your work will be essential to advancing the performance and scalability of our quantum processors. You will focus on the research, development, and physical realization of the quantum signal chain, with a particular emphasis on Traveling Wave Parametric Amplifiers (TWPAs) and readout components—utilizing superconducting devices both with and without Josephson junctions.
You will work in an international, collaborative environment, bridging the gap between fundamental physics and engineering. Working in a tight feedback loop with experimentalists and design engineers, you’ll turn measurement insights into rapid fabrication iterations that push the performance of our parametric devices. Your contributions will be essential in meeting our technical and product milestones, ensuring QuantWare remains at the forefront of quantum computing innovation.
What you'll be doing
- Fabrication Workflow Optimization: Continuously improve our fabrication workflow for readout devices and TWPAs, utilizing feedback from the measurement and design engineers to iterate on device performance.
- Process Standardization: Develop and maintain high-standard protocols for the fabrication of superconducting components, ensuring high yield and reproducibility across different wafers.
- Innovative Material Research: Investigate new materials and technological solutions to improve device metrics.
- Documentation & Reporting: Maintain detailed documentation of experimental setups, process protocols, and characterization results; prepare technical reports and presentations to communicate progress and insights to the wider team.
- Collaborative Development: Work closely with multidisciplinary teams to ensure that innovations in the readout chain are successfully integrated into our next-generation quantum processors.
Your Profile
- Nanofabrication and cleanroom experience with E-beam / UV lithography / dry etching / wet etching / PVD and CVD/ diagnostics (2+ yrs). Specialized experience in Josephson junction fabrication is highly valued.
- A Ph.D. or equivalent experience (Master’s degree + 2 years of industry experience) in Physics, Materials Science, Electrical Engineering, or a related field.
- Hands-on experience in a cleanroom environment, fabricating superconducting devices.
- Ability to work effectively both independently and as part of a multidisciplinary team.
- Excellent written and verbal communication skills.
What We Offer:
At QuantWare, you’ll be part of a high-performing team of world-class experts in an ambitious, fast-moving environment. From day one, you’ll have the trust, tools, and support to do your best work. Here’s what you can expect:
Competitive salary - A competitive monthly salary, plus an 8% annual holiday bonus paid out each May
Pension that’s built to last - A future-proof pension plan that includes partner and dependent coverage. QuantWare covers 63% of the premium
Flexibility built on trust - We focus on outcomes. Work flexibly, in a hybrid setup, with an open vacation policy that lets you manage your time
Relocation support - If you’re moving to the Netherlands, we’ll make the transition seamless. We cover visa support, temporary housing in most cases, and help securing the expat tax benefit for eligible candidates.
Personal growth - We invest in your L&D, with a budget available to each team member, dependent on their individual ambitions, development needs, and performance
A connected team - We make space to celebrate wins together, with team events, offsites, and spontaneous moments that bring us closer
Diversity & Inclusion at QuantWare
We’re an ambitious company, not only for our goals but also to become an even more diverse and inclusive team. We know this helps us with better decisions, more innovation, and strengthens our culture. In particular, we’d love to see more women in the quantum industry!
So if you’re a female talent, excited about this opportunity but don’t meet every single requirement, we still encourage you to apply.
As part of our recruitment process, candidates may be required to undergo pre-employment screening.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The requirement for specialized fabrication expertise in parametric quantum devices marks a critical transition from experimental physics to industrial-scale quantum hardware engineering. As the industry moves toward logical qubit scaling, the stabilization and optimization of the quantum signal chain—specifically readout amplification—becomes a primary determinant of gate fidelity and error mitigation performance. This role type serves as the structural bridge between theoretical device design and the physical realization of high-yield superconducting architectures. Verifiable market signals indicate that while qubit counts increase, the supporting microwave infrastructure remains a significant bottleneck for fault-tolerant development. Consequently, this engineering tier is essential for translating deep-tech research into the reproducible hardware milestones required for commercial-grade quantum processors. By standardizing fabrication workflows for parametric amplifiers and readout components, these professionals secure the foundational throughput of the global quantum hardware value chain.
The global quantum hardware sector is currently navigating a pivotal phase characterized by the shift from Technology Readiness Level (TRL) 4 to TRL 6 and beyond. This progression necessitates a move away from bespoke laboratory processes toward standardized, high-volume nanofabrication. Within this ecosystem, the fabrication of parametric devices and superconducting signal chains sits at the intersection of material science and systems integration. As noted in various national quantum strategies, the maturity of a hardware platform is often limited not by the qubits themselves, but by the performance and reproducibility of the peripheral control and readout hardware.
Macro-level analysis reveals that the scalability of superconducting quantum computers is heavily dependent on the integration of high-performance components like Traveling Wave Parametric Amplifiers (TWPAs). These devices are critical for maintaining signal-to-noise ratios as processors scale toward the MegaQubit regime. However, the manufacturing of these components involves complex Josephson junction lithography and advanced thin-film processes that remain susceptible to fabrication defects and yield variability. This creates a strategic dependency on a specialized workforce capable of managing the tight feedback loops between experimental measurement and cleanroom iteration.
Furthermore, the convergence of quantum hardware and classical semiconductor foundry models is emerging as a dominant trend. The ability to implement advanced lithographic techniques—such as electron-beam and UV lithography—within a quantum-specific context is essential for achieving the device densities required for fault-tolerant architectures. As public and private funding cycles prioritize sovereign hardware capabilities, the development of stable, in-house fabrication pipelines serves as a primary credibility signal for investors and industrial partners. This technical enablement tier effectively mitigates the supply chain risks associated with the limited availability of high-fidelity readout components in the open market.
The capability architecture for this role type is built upon the synthesis of advanced nanofabrication domains and the physical principles of superconducting electronics. At the core is a mastery of lithographic layers—including E-beam and high-resolution UV systems—which are necessary for the precise patterning of Josephson junction arrays and sub-micron microwave circuits. This is coupled with expertise in subtractive and additive processing, such as dry etching and physical vapor deposition (PVD), which directly dictate the surface quality and dielectric loss of the quantum device. These capabilities are structurally significant because they determine the coherence properties and operational bandwidth of the entire quantum signal chain. Beyond the cleanroom, the role integrates a technical interface with cryogenic measurement data, where insights into kinetic inductance or junction resistance are translated back into process optimizations. This cross-functional coupling ensures that innovations in parametric amplification are interoperable with scaling processor architectures. By standardizing these complex protocols, the role enables the transition from isolated device successes to high-yield, wafer-scale production environments.
• Accelerates the transition from laboratory prototypes to standardized commercial quantum hardware architectures
• Mitigates systemic yield risks in the production of high-fidelity superconducting readout components
• Strengthens the technological readiness of the quantum signal chain for fault-tolerant computing
• Optimizes the integration of parametric amplification layers within large-scale quantum processor designs
• Reducess the iteration friction between experimental device research and industrial manufacturing workflows
• Facilitates the development of high-density Josephson junction architectures necessary for qubit scaling
• Enhances the signal-to-noise performance of quantum systems through stabilized amplifier fabrication
• Secures the foundational infrastructure for high-throughput superconducting device characterization and testing
• Drives the standardization of cleanroom protocols for reproducible quantum hardware production cycles
• Shortens the development timeline for next-generation quantum signal processing units
• Protects intellectual property assets through the physical realization of proprietary QPU technologies
• Enables the deterministic scaling of hardware platforms toward practical, utility-scale quantum applications
Industry Tags: Quantum Hardware Engineering, Nanofabrication, Superconducting Electronics, Josephson Junctions, Parametric Amplifiers, Readout Chain, Cleanroom Technology, Quantum Processor Scaling, Deep Tech Manufacturing, Semiconductor Integration
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