About Us
QuantWare is building the world’s most powerful quantum processors to solve humanity's greatest challenges. We do this with our unique VIO™ technology, the only QPU architecture that breaks the hardware barriers that have held quantum computing back, unlocking the path to MegaQubit quantum processors.
With VIO, we are paving the way for the hyper-scale quantum computers that will change the world. And delivering on that vision demands people who don’t shy away from tackling the hardest challenges of our time. That’s where you come in!
We are looking for a Senior Quantum Measurement and Calibration Engineer to drive the experimental characterization, diagnostic protocol development, and performance optimization of our next-generation quantum processors. You will be responsible for building advanced diagnostic routines that isolate loss mechanisms, quantify crosstalk, budget gate errors, and improve operational fidelities across our QPUs and development prototypes.
You will work in our Quantum Processor team at the core of our measurement efforts, collaborating closely with QPU Design, Measurement and Software Engineers. Your measurements will directly contribute to improving our quantum processor performance and push the edge of what is currently possible.
What you’ll be doing
- Advanced measurement protocols: Create and refine advanced protocols to improve quantum gate and readout fidelities and develop diagnostics tooling to identify performance bottlenecks (e.g. noise and TLS spectroscopy, gate error budgeting).
- Design and execution of experiments: Design and execute experiments to validate, compare, and benchmark new design elements and layout optimisations (e.g. coupling schemes, filtering, crosstalk mitigations).
- Data-Driven Feedback: Analyze measurement datasets, report findings with clarity, and lead discussions with the broader engineering teams to translate experimental learnings into device design upgrades.
- Ownership: Take complete ownership of measurement campaigns – from the initial hypothesis and experiment design through cooldown, data acquisition, analysis, and final reporting.
Your Profile
- 5+ years of hands-on experience in cryogenic measurement of multi-qubit superconducting quantum processors.
- Extensive experience in diagnosing performance-limiting mechanisms in superconducting quantum processors.
- Deep understanding of cQED and superconducting quantum device behaviour and signal integrity challenges.
- Proficiency in Python and data analysis for quantum experiments
- A proactive, detail-oriented mindset with a strong drive to scale quantum technology
- You thrive in a collaborative environment and are comfortable taking ownership from day one.
Don't tick every box? Apply anyway. We know great candidates don't always follow a straight path, and we value diverse experience, perspectives, and ways of thinking. If this role excites you and you believe you can make an impact, we'd love to hear from you!
What We Offer:
At QuantWare, you’ll be part of a high-performing team of world-class experts in an ambitious, fast-moving environment. From day one, you’ll have the trust, tools, and support to do your best work. Here’s what you can expect:
Competitive salary - A salary that reflects the impact and importance of the role (and of course 8% holiday allowance)
Pension that’s built to last - A generous and future-proof pension plan that includes partner and dependent coverage.
Flexibility built on trust - We focus on outcomes. Work flexibly, in a hybrid setup, with an open vacation policy that lets you manage your time
Personal growth - We invest in your L&D, with a budget available to each team member, dependent on their individual ambitions, development needs, and performance
A connected team - We make space to celebrate wins together, with team events, offsites, and spontaneous moments that bring us closer
Diversity & Inclusion at QuantWare
We’re an ambitious company, not only for our goals but also to become an even more diverse and inclusive team. We know this helps us with better decisions, more innovation, and strengthens our culture. In particular, we’d love to see more women in the quantum industry!
So if you’re a female talent, excited about this opportunity but don’t meet every single requirement, we still encourage you to apply.
As part of our recruitment process, candidates may be required to undergo pre-employment screening.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
As quantum hardware scales toward multi-qubit architectures, the primary structural bottleneck in superconducting quantum processors has shifted from fabrication yield to characterization and error mitigation. Quantum measurement and calibration engineers serve as a critical bridge between physical QPU fabrication and system-level execution, ensuring that operational gate fidelities match theoretical limits. Without automated, high-throughput characterization protocols, physical processors remain constrained by environmental decoherence, two-level system dynamics, and cross-talk noise. This role type stabilizes the lower layers of the quantum hardware stack, directly accelerating the technology readiness level of scalable QPUs. By translating complex physical noise signatures into actionable design feedback, this engineering discipline enables predictable processor performance across cryogenic deployment cycles. Consequently, expertise in QPU diagnostics functions as a key determinant of hardware yield, commercial reliability, and eventual fault-tolerant scaling.
The quantum computing sector is undergoing a transition from laboratory-scale experiments to integrated, industrial-grade quantum processing hardware. Within the quantum value chain, quantum measurement and calibration engineering occupies a pivotal position between device design, cryogenic control systems, and software execution layers. As QPU tile counts increase, hardware vendors face severe scaling bottlenecks related to the exponential growth of calibration parameter spaces. Manual characterization techniques fail to support continuous operational requirements, necessitating automated diagnostic frameworks capable of continuous noise tracking and gate tuning.
Macro constraints in this domain center on signal integrity, thermal dissipation limits within dilution refrigerators, and persistent material-level loss mechanisms. Furthermore, ongoing ecosystem initiatives aim to accelerate readiness for practical quantum applications by establishing standardized benchmarking standards across heterogeneous processing units. The integration of high-density microwave routing and custom Cryo-CMOS or room-temperature control electronics further complicates error budgeting, requiring systemic diagnostic isolation.
Organizational dependencies in the hardware tier rely heavily on rapid iteration cycles between physical test runs and chip layout modifications. As commercial quantum processors integrate into broader high-performance computing ecosystems, device stability and automated calibration routines become pre-conditions for cloud access uptime. Consequently, engineering capabilities in low-temperature physics and Automated Test Equipment (ATE) software pipelines represent high-leverage assets within deep-tech hardware manufacturing.
The capability architecture for this role type combines circuit quantum electrodynamics (cQED) principles with advanced automated measurement frameworks and data analysis pipelines. Operational effectiveness depends on constructing diagnostic tools that quantify two-level system (TLS) defect distributions, flux-noise spectral densities, and parasitic coupling vectors across multi-qubit grids. Mastery over microwave signal processing, cryogenic RF chains, and real-time pulse shaping interfaces enables precise control over gate synthesis and readout fidelity optimization. At the software level, proficiency in scientific Python environments, automated pipeline development, and statistical analysis allows engineers to translate raw time-domain and frequency-domain spectroscopy data into scalable feedback loops. These integrated capabilities interface directly with physical QPU design teams to guide structural layouts and with quantum software teams to establish precise hardware abstraction layers. - Accelerates the deterministic transition from experimental prototype QPUs to commercially viable quantum hardware platforms
- Mitigates systemic signal degradation risks by establishing rigorous noise spectroscopy and error budgeting routines
- Facilitates the integration of multi-qubit processors into standardized cryogenic and high-performance computing environments
- Strengthens device operational uptime through automated calibration, tracking, and continuous parameter drift correction
- Reduces hardware iteration friction between physical device fabrication and layout architecture redesigns
- Optimizes quantum gate fidelities and readout performance across multi-qubit processor arrays
- Enhances QPU yield predictability by isolating material defects and localized loss mechanisms
- Supports scalable hardware deployments by automating high-throughput diagnostic routines at dilution temperatures
- Improves characterization data transparency for downstream compiler and software abstraction integration
- Enables reproducible benchmarking protocols across multi-qubit superconducting processor architectures
- Protects capital-intensive fabrication cycles by validating design modifications through precise experimental metrics
- Orchestrates cross-layer coordination between RF hardware engineers, QPU designers, and system software architectsIndustry Tags: Superconducting Qubits, Quantum Diagnostics, Circuit QED, Cryogenic Measurement, QPU Calibration, Quantum Hardware Scaling, Microwave Engineering, Gate Fidelity Optimization, Quantum Characterization
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