About Us
QuantWare is building the world’s most powerful quantum processors to solve humanity's greatest challenges. We do this with our unique VIO™ technology, the only QPU architecture that breaks the hardware barriers that have held quantum computing back, unlocking the path to MegaQubit quantum processors.
With VIO, we are paving the way for the hyper-scale quantum computers that will change the world. And delivering on that vision demands people who don’t shy away from tackling the hardest challenges of our time. That’s where you come in!
We are seeking a Senior Quantum R&D Engineer – Processors to join our Quantum Processor team and develop the next generation of Quantum Processing Units (QPU). This role is focused on improving processor performance by designing, validating and iterating on-chip architectures like inter-qubit couplers and readout architectures. You will take ownership of the end-to-end development cycle, creating designs, collaborating with our fabrication teams and performing cryogenic measurement to inform design iterations. You will directly contribute these improvements into our large-scale QPUs.
What you’ll be doing
- Design & Simulate: Conceive, model, and layout next-generation, large-scale superconducting quantum processor architectures. Design custom test vehicles and prototypes to compare and validate new component implementations (like inter-qubit couplers and readout architectures), before integrating them into full-scale processors.
- Measure & Validate: Close the feedback loop by designing and performing cryogenic measurements on your own designs to validate performance and inform design improvements.
- Ownership: Take complete ownership of device or component development – from the initial concept through design, simulation, experiment, data analysis, and iteration.
- Automate: Write and improve code to automate design, simulation, and measurement workflows.
- Collaborate: Collaborate closely with design and measurement engineers, teams to ensure rapid design-to-test cycles
Your Profile
- 5+ years of hands-on experience in multi-qubit superconducting quantum device development
- Deep understanding of cQED, quantum microwave circuits and superconducting qubits.
- Extensive experience in design and cryogenic measurement of superconducting qubit circuits
- Proficiency in Python and software tools for quantum design and experiments (e.g. HFSS, Comsol, pyEPR, scqubits, Quantum Metal, KLayout, etc.)
- A proactive, detail-oriented mindset with a strong drive to scale quantum technology
- You thrive in a collaborative environment and are comfortable taking ownership from day one.
Don't tick every box? Apply anyway. We know great candidates don't always follow a straight path, and we value diverse experience, perspectives, and ways of thinking. If this role excites you and you believe you can make an impact, we'd love to hear from you!
What We Offer:
At QuantWare, you’ll be part of a high-performing team of world-class experts in an ambitious, fast-moving environment. From day one, you’ll have the trust, tools, and support to do your best work. Here’s what you can expect:
Competitive salary - A salary that reflects the impact and importance of the role (and of course 8% holiday allowance)
Pension that’s built to last - A generous and future-proof pension plan that includes partner and dependent coverage.
Flexibility built on trust - We focus on outcomes. Work flexibly, in a hybrid setup, with an open vacation policy that lets you manage your time
Personal growth - We invest in your L&D, with a budget available to each team member, dependent on their individual ambitions, development needs, and performance
A connected team - We make space to celebrate wins together, with team events, offsites, and spontaneous moments that bring us closer
Diversity & Inclusion at QuantWare
We’re an ambitious company, not only for our goals but also to become an even more diverse and inclusive team. We know this helps us with better decisions, more innovation, and strengthens our culture. In particular, we’d love to see more women in the quantum industry!
So if you’re a female talent, excited about this opportunity but don’t meet every single requirement, we still encourage you to apply.
As part of our recruitment process, candidates may be required to undergo pre-employment screening.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The scaling of superconducting quantum processing units requires dedicated hardware engineering to resolve physical bottlenecks in inter-qubit coupling, gate fidelity, and signal routing. As quantum hardware transitions from early prototype architectures toward commercial-scale processors, processor R&D engineering serves as a foundational lever for improving multi-qubit coherence and yield. This structural role type directly links high-frequency circuit design with cryogenic characterization, accelerating the iteration cycle required to validate novel chip geometries. High-density component integration and precise thermal-electrical management are critical to closing the technology readiness gap. By systematically resolving chip-level performance degradation, this engineering function stabilizes the supply chain for advanced quantum computing platforms. QuantWare and the broader hardware sector rely on this technical capacity to systematically advance quantum processing units toward fault-tolerant regimes.
Superconducting quantum computing platforms reside at a crucial juncture where increasing physical qubit counts introduces severe constraints in crosstalk, wiring density, and thermal dissipation. Within the broader quantum value chain, quantum processor engineering occupies the core physical layer, dictating the ultimate execution capacity of downstream compiler and software stacks. Current sector-wide focus lies on bridging classical and quantum capabilities at scale, requiring significant architectural innovations at the physical device level.
Macro risks across the hardware ecosystem include high manufacturing variance, cryogenic cabling bottlenecks, and specialized component supply chain vulnerabilities. As multi-qubit architectures expand, passive scaling strategies yield diminishing returns due to parasitic modes and control line congestion. Overcoming these scaling limits requires modular processor designs, advanced 3D packaging, and refined on-chip coupling mechanisms that maintain high gate fidelities across larger physical footprints.
Furthermore, public and private capital deployments are increasingly conditional on clear technology readiness level advancement. The ongoing specialization of the quantum hardware workforce reflects a shift from academic lab environments to industrial-grade semiconductor-like prototyping pipelines. Aligning physical layout design with rapid cryogenic testing cycles provides the empirical feedback necessary to mitigate high capital risks associated with advanced fabrication runs.
The capability structure for processor R&D engineering relies on combining electromagnetic modeling, microwave circuit design, and automated cryogenic measurement. Proficiency in circuit quantum electrodynamics enables the precise modeling of Josephson junction parameters, resonator modes, and coupling strengths. Utilizing automated design suites alongside layout serialization tools ensures that complex multi-qubit layouts remain defect-free prior to lithographic fabrication. On the characterization front, expertise in low-temperature electronics, RF signal conditioning, and automated data processing allows engineers to map cross-talk matrices and coherence distributions efficiently. These integrated capabilities directly determine the speed and accuracy of physical iteration cycles within deep-tech hardware pipelines. - Accelerates the transition of superconducting quantum hardware from laboratory prototypes to commercially scalable processors
- Enhances multi-qubit gate fidelities by systematically isolating and reducing spatial crosstalk and environmental decoherence
- Drives down processor iteration costs through rigorous pre-fabrication finite element modeling and high-frequency circuit simulation
- Establishes robust empirical feedback loops between low-temperature characterization labs and nanofabrication facilities
- Optimizes control line routing and signal attenuation strategies within dilution refrigerator test environments
- Shortens technology readiness level progression cycles for novel inter-qubit coupling architectures and readout components
- Standardizes physical benchmarking protocols for evaluating uniformity, energy relaxation times, and phase coherence
- Reduces supply chain friction by establishing repeatable component layout specifications for modular quantum hardware
- Supports the architectural transition toward fault-tolerant quantum computing through high-density device integration
- Expands the functional yield of complex multi-qubit chips by identifying structural manufacturing defects early
- Facilitates modular system expansion by resolving key thermal and electrical bottlenecks at the chip-package interface
- Strengthens overall hardware reliability to provide stable execution environments for hybrid quantum-classical algorithmsIndustry Tags: Superconducting Qubits, Quantum Processing Units, Circuit Quantum Electrodynamics, Cryogenic Measurement, Quantum Hardware, Microwave Engineering, Chip Layout Design, Nanofabrication Alignment, Deep Tech Hardware
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