Quandela stands as a global leader in quantum computing, driven by groundbreaking technology and a strategic vision for scaling quantum solutions. The company’s unique ability to offer both hardware and software solutions, along with its commitment to build energy efficient datacenters and scalability, positions it to play a key role in the next wave of innovation, and in many strategic and sovereign industrial sectors.
Join Us at the Forefront of Quantum Computing Innovation 🚀
We are looking for a senior Hardware / Software Engineer profile with more than 10 years of experience, capable of working on complex systems combining hardware, FPGA, firmware, embedded software, RF, optics/photonics, and system integration.
The position involves strong interaction with various technical teams: optics, electronics, FPGA, firmware, software, application developers, and hardware integration. The person will work within a multidisciplinary team of approximately 30 people and will report to the Hardware Integration Manager.
Your Key Responsibilities :
Hardware/Software Architecture and System Integration
- Design, integrate, and validate complex hardware/software systems.
- Contribute to the architecture of high-performance embedded systems.
- Ensure integration between electronic boards, FPGAs, firmware, embedded software, and host software.
- Understand the constraints of a complete system: electronics, RF, optics, timing, synchronization, software control, and validation.
- Debug complex issues at the interface between hardware, FPGA, firmware, and software.
- Contribute to architecture decisions, component selection, interface design, and test methodologies.
Cross-functional Technical Coordination
- Act as the technical interface between hardware, software, electronics, optics/photonics, and application development teams.
- Work closely with integration, test, validation, and production teams.
- Translate system requirements into actionable technical specifications for the various teams.
- Facilitate communication between technical disciplines with differing constraints.
- Identify integration risks and propose robust solutions.
- Participate in technical reviews, architecture trade-offs, and system validation phases.
FPGA, Firmware, and Embedded Software
- FPGA development in Verilog or SystemVerilog.
- Proficiency with Vivado, PetaLinux, and Xilinx / AMD platforms.
- Experience with FPGA SoCs such as Zynq or Versal.
- Firmware development in C under embedded Linux.
- Experience with TCP/UDP, low-level drivers, U-Boot, diagnostics, and test tools.
- Development of control, test, or automation tools in Python.
- Ability to work on real-time, low-latency, or high-performance constrained systems.
RF, Signal, and Instrumentation
- Experience with RF systems, DDS, high-speed DAC/ADC, or signal generation
- Knowledge of high-speed interfaces such as JESD204B/JESD204C.
- Experience with Analog Devices components or equivalents.
- Understanding of signal generation, modulation, amplification, and control chains.
- Interest in or experience with scientific, quantum, laser, or laboratory instrumentation environments.
- Minimum 10 years of experience in hardware/software, FPGA, embedded systems, or system integration.
- Significant experience on complex technical systems, ideally in an R&D or product environment.
- Demonstrated experience coordinating with multiple technical teams.
- Ability to take on a technical reference or technical lead role.
- Experience in a multidisciplinary environment involving hardware, software, electronics, and optics/photonics.
- Competitive salary, flexible based on your experience and expectations
- Profit-sharing & company savings plan
- 100% health coverage (Alan)
- 50% transport reimbursement or sustainable mobility bonus
- Meal vouchers (Swile), Gymlib fitness support
- Childcare assistance & referral bonuses (€1,000–€2,000)
What we offer:
- A meaningful role with real ownership, from day one
- A team eager to collaborate and grow with you
- Daily exposure to the entire quantum stack — from high-level APIs to low-level firmware, and everything in between.
Process
- Talent Acquisition Interview (30' - 45')
- Hiring Manager Interview (45')
- Use Case (a live use case or one to be prepared at home and presented afterward)
- Meeting with the teams
- 2 reference check
- Offer
(This process is provided for guidance only and may evolve depending on the roles)
At Quandela, we believe that the strength of our team is the plurality of experiences, perspectives, and journeys. We are committed to building a respectful, inclusive, and welcoming work environment. All applications are welcome.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The maturation of the quantum hardware stack requires a specialized tier of systems engineering that bridges the gap between abstract algorithmic design and physical chip interfaces. This role type is structurally necessary to manage the extreme synchronization and timing constraints inherent in photonic and superconducting modalities, where classical control electronics must operate with nanosecond precision. By orchestrating the integration of high-performance FPGAs and embedded software, this function secures the stability of the "control and readout" layer of the value chain. Verifiable market signals, such as the increasing investment in on-premises quantum deployments, indicate that the ability to architect these complex hybrid systems is a primary determinant for achieving technical readiness levels suitable for industrial sovereign sectors.
The quantum computing industry is currently navigating a pivotal transition from laboratory-scale experiments to integrated, scalable architectures. Within the value chain, the "control electronics and system integration" layer serves as the critical bottleneck for scaling physical qubit counts. As hardware modalities diversify, particularly in photonics and neutral atoms, the industry faces significant integration risks related to signal integrity, thermal management, and data throughput. Macro-level analysis suggests that the fragmentation of the vendor ecosystem—where diverse hardware providers utilize varying interconnect standards—has necessitated a workforce capable of cross-platform architectural synthesis.
Furthermore, the emergence of hybrid classical-quantum supercomputing environments, such as those integrated with GPU-accelerated clusters, places immense pressure on the embedded software layer. Industry reports from the QED-C and OECD highlight a profound talent scarcity at the intersection of low-level firmware development and quantum physics. This role type addresses this mismatch by facilitating the "application enablement" phase, ensuring that high-level software instructions are accurately translated into the physical signals required for qubit manipulation.
Infrastructure dependencies, particularly regarding the supply chain for high-speed DAC/ADC components and FPGA SoCs, remain a strategic concern for global quantum leaders. Consequently, the sector is shifting toward modular, open-source interfaces to improve interoperability and reduce long-term maintenance friction. This strategic evolution emphasizes the need for systems engineers who can navigate the interface between RF engineering, digital logic, and high-level Python-based control toolchains, thereby stabilizing the path toward fault-tolerant quantum advantage.
The capability architecture for this role centers on the deterministic synchronization of multidisciplinary technical domains. Mastery of high-performance FPGA development and embedded Linux environments is essential for managing the high-throughput data streams required for real-time quantum error correction and state readout. This technical proficiency is coupled with expertise in RF signal chains and high-speed instrumentation interfaces, which are vital for maintaining the fidelity of control pulses. These capabilities matter because they directly influence the structural stability and reproducibility of quantum operations across the entire stack. By facilitating a high-level coupling between hardware integration and application development, these experts ensure that system-level constraints—such as timing jitter and signal attenuation—are addressed at the architectural stage. This proactive approach reduces the likelihood of systemic failures during the scaling phase and optimizes the performance of complex hybrid systems.
Accelerates the deterministic progression of technology readiness levels for modular photonic quantum processors
Mitigates systemic integration risks by standardizing interfaces between classical control hardware and quantum chips
Facilitates the transition from experimental prototypes to energy-efficient, on-premises quantum datacenter architectures
Reduces iteration friction in the development of real-time, low-latency firmware for quantum error correction
Strengthens the long-term sovereign capability of industrial sectors through the deployment of secure quantum systems
Harmonizes abstract software requirements with the physical constraints of RF and high-speed signal generation
Optimizes the lifecycle of quantum-classical hybrid systems through the implementation of robust system-level validation
Supports the scaling of physical qubit counts by architecting high-performance embedded control infrastructures
Shortens the time-to-market for scalable quantum solutions by ensuring infrastructure alignment with hardware roadmaps
Improves the reliability of multi-stakeholder R\&D initiatives through the application of rigorous hardware-software co-design
Protects capital-intensive deep-tech investments by providing expert technical validation of complex system architectures
Enables the strategic orchestration of multidisciplinary development efforts across global quantum networks
Industry Tags: Quantum System Integration, Photonic Computing, FPGA Architecture, Embedded Firmware, RF Engineering, Quantum Hardware Stack, System-on-Chip, High Performance Computing, Quantum Control Systems
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