A propos de Pasqal
Pasqal conçoit et développe des processeurs quantiques (QPUs : Quantum Processing Units) et les outils logiciels associés.
Notre technologie innovante permet de traiter des cas d’usage qui sont à ce jour hors de portée des plus puissants des supercalculateurs ; ces cas peuvent concerner des défis industriels applicatifs aussi bien que les besoins des sciences fondamentales.
Au-delà de la puissance de calcul exceptionnelle qu’ils apportent, les QPUs sont d’une très grande efficacité énergétique et contribueront à réduire fortement l’empreinte carbone de l’industrie du calcul intensif.
Description du poste
Vous intégrerez le pôle Electronics, une équipe pluridisciplinaire où votre expertise sera clé. Vous contribuerez directement à la conception et à l'industrialisation de nos Quantum Processing Units QPU. Plus précisément, vous développerez des modules complexes basés sur des SoC ARM/FPGA qui sont au cœur de nos innovations. Ces modules sont essentiels pour la manipulation d'atomes uniques et de leurs états, exigeant la mise en œuvre de technologies de pointe.
Vous participerez activement à la réalisation et à l'intégration de ces sous-systèmes, de l'expression des besoins initiaux jusqu'à la mise en service finale. Vous travaillerez en étroite collaboration avec l'ensemble des experts techniques du QPU : les équipes Embedded Software, optique, mécanique, système et production
Vos missions
- Analyser les besoins et définir l’architecture de modules intégrant des SoC ARM/FPGA.
- Rédiger/contribuer aux spécifications techniques et participer à la planification.
- Développer des blocs HDL (SystemVerilog / VHDL / Verilog) et du firmware C selon les besoins du projet.
- Définir et mettre en œuvre des méthodologies de vérification FPGA (simulation + validation sur cible) afin de garantir robustesse et maintenabilité.
- Participer au cycle documentaire, aux processus d’équipe et à la gestion de configuration (Git).
- Contribuer à l’intégration système, à l’installation et à la mise en service.
À propos de vous
- Solide expérience d'au moins 3 ans en développement FPGA (Verilog/VHDL et/ou SystemVerilog).
- Connaissance du flow FPGA : synthèse, implémentation, contraintes timing, debug (ILA/logic analyzers, etc.)
- Bon niveau en C pour firmware/bring-up (et capacité à collaborer avec l’embarqué).
- Maîtrise de Git et bonnes pratiques d’ingénierie (revue de code, doc, traçabilité).
- À l’aise dans un environnement Linux.
Apprécié (selon votre expérience)
- SoC ARM/FPGA et environnements type Yocto / Linaro.
- Outils Xilinx Vivado / Vitis / HLS et simulateurs (ex. Questa).
- Méthodes de vérification (testbenches, assertions, stratégie de validation, etc.).
- Expérience sur des interfaces et systèmes haut débit : Ethernet, JESD204x, LVDS, Camera Link, CoaXpress, etc.
- Python (outillage, tests, automatisation).
- Prototypage/bring-up : cartes d’évaluation, maquettes, intégration
Ce que nous offrons
- De bureaux neufs à Massy
- Un rythme flexible de présentiel (2-3 jours de télétravail par semaine )
- Type de contrat : CDI
- Une équipe internationale dynamique et soudée
- Un rôle clé dans une start-up en pleine croissance
- Du temps libre pour vous former et aller à des conférences/meetups
Process de recrutement
- Un entretien avec notre talent acquisition de 30’
- Un échange avec notre technical lead FPGA
- Une rencontre avec l’équipe dans nos bureaux
- Une offre !
Pasqal est un employeur garantissant l'égalité des chances. Nous nous engageons à créer un lieu de travail diversifié et inclusif, car l'inclusion et la diversité sont essentielles à la réalisation de notre mission. Nous encourageons les candidatures de tous les candidats qualifiés, quels que soient leur sexe, leur race, leur origine ethnique, leur âge, leur religion ou leur orientation sexuelle
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The transformation of quantum computing from laboratory proof-of-concept to scalable commercial infrastructure depends fundamentally on the development of high-precision classical control electronics. Field-Programmable Gate Array (FPGA) engineering within the neutral-atom modality represents a critical bridge in the deep-tech value chain, directly translating software-level algorithmic instructions into microsecond-scale physical control signals. As the industry advances across varying Technology Readiness Levels (TRLs), the architectural stability of these embedded hardware platforms dictates the overall gate fidelity and system uptime. Market analyses from organizations like the Quantum Economic Development Consortium emphasize that real-time hardware-level determinism is a prerequisite for error mitigation. Consequently, this engineering function serves as a primary mechanism for scaling physical qubit control architectures while preserving power efficiency and lowering system latency.
Within the broader quantum hardware value chain, control electronics operate as the vital interface layer between abstract software frameworks and the physical manipulation systems. In neutral-atom architectures, where individual atoms are trapped and modulated by complex laser matrices, the demands on signal processing throughput are exceptionally severe. The ecosystem currently faces a structural bottleneck: while quantum algorithms continue to mature, the hardware capable of orchestrating massive parallel operations with minimal phase noise remains scarce. This mismatch highlights a systemic risk where computational potential outpaces physical execution capabilities.
Furthermore, integrating these advanced systems requires deep alignment with standard industrial high-performance computing (HPC) infrastructures. Current sector-wide focus lies on bridging classical and quantum capabilities at scale, requiring co-design strategies that combine high-speed digital electronics with deterministic embedded firmware. Public and private investments globally are shifting from pure physics research toward systems engineering, placing a premium on platforms that implement robust verification methodologies and configuration workflows.
This pivot to industrial-grade reliability requires a transition away from ad-hoc prototyping toward rigorous, maintainable hardware architectures. The mitigation of vendor fragmentation across the deep-tech supply chain depends on developing modular control stacks that can adapt to rapid physical advancements without requiring a complete redesign of the underlying electronic framework.
The capability profile for this role type centers on the synchronization of hardware description languages with modern embedded software development processes. Designing architectures that combine hardware-level parallel execution with high-speed serial transceivers is essential for managing the dense data streams required for real-time quantum error correction and state readouts. This specialized skill architecture enables the abstract manipulation of system states by decoupling physical device dependencies from high-level operational commands.
These engineering capabilities directly impact system throughput by ensuring that timing constraints are met deterministically across multi-layered processing blocks. By establishing standardized validation frameworks and automated hardware-in-the-loop simulation methodologies, this function reduces the cycle friction between physical breakthroughs and system-level deployment. The cross-functional coupling between digital logic design and embedded software ensures that control interfaces are optimized for low-latency feedback loops, which are critical for the execution of hybrid classical-quantum workflows. - Accelerates the transition of neutral-atom hardware systems from laboratory prototypes to scalable, high-compute enterprise infrastructures
- Maximizes physical qubit manipulation precision by implementing low-latency, deterministic digital logic architectures
- Mitigates architectural fragmentation through the design of modular, reusable hardware blocks and standard configurations
- Strengthens the reproducibility of quantum experiments by deploying robust hardware-in-the-loop validation frameworks
- Facilitates the integration of advanced control platforms with high-speed networking and enterprise cloud infrastructures
- Reduces development cycle friction by synchronizing embedded software interfaces with low-level digital logic design
- Optimizes system-level power efficiency by leveraging advanced system-on-chip architectures for parallel data processing
- Decreases deployment risk across the deep-tech supply chain through rigorous technical specifications and documentation
- Enhances long-term system maintainability by applying structured version control and automated verification methodologies
- Minimizes phase noise and signal degradation across high-bandwidth interfaces to protect physical gate fidelities
- Secures predictable scaling pathways for neutral-atom processors through close collaboration with cross-functional technical teams
- Reconciles complex physical requirements with industrial electronics standards to support commercial market readinessIndustry Tags: Quantum Computing Hardware, Embedded Systems Architecture, FPGA Control Electronics, Neutral Atom Manipulation, Low Latency Signal Processing, System on Chip Engineering, Digital Logic Verification, Deep Tech Hardware Integration, Industrial Quantum Scale
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