Alice & Bob is developing the first universal, fault-tolerant quantum computer to solve the world’s hardest problems.
The quantum computer we envision building is based on a new kind of superconducting qubit: the Schrödinger cat qubit 🐈⬛. In comparison to other superconducting platforms, cat qubits have the astonishing ability to implement quantum error correction autonomously!
We're a diverse team of 250+ brilliant minds from over 35 countries united by a single goal: to revolutionise computing with a practical fault-tolerant quantum machine. Are you ready to take on unprecedented challenges and contribute to revolutionising technology? Join us, and let's shape the future of quantum computing together!
About the role
As a Nanofabrication Process Technician, you will be a key contributor to Alice&Bob's fabrication capability. Working in a cutting-edge cleanroom, you will execute the fabrication processes that transform wafer designs into superconducting quantum circuits.
You will operate advanced semiconductor manufacturing equipment, monitor process quality, and contribute to maintaining a reliable and efficient production environment. Beyond running processes, you will take ownership of selected equipment, helping ensure its availability, performance, and continuous improvement.
Success in this role is measured by the ability to execute wafer fabrication safely, repeatably, and efficiently while contributing to the team's throughput and equipment availability objectives.
This position is ideal for someone who enjoys hands-on technical work, thrives in a highly disciplined environment, and takes pride in delivering high-quality results through rigor, precision, and teamwork.
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Responsabilities
As a member of the Cleanroom Operations team, you will:
Execute wafer fabrication
- Execute production and R&D wafer fabrication according to approved Standard Operating Procedures (SOPs)
- Operate a wide range of nanofabrication equipment
- Ensure the highest standards of quality, repeatability, and traceability throughout the fabrication process
- Monitor process qualityPerform in-line process characterization (optical microscopy, profilometry, reflectometry, etc.)
- Record and analyze process data to ensure compliance with process specifications
- Report process deviations and contribute to root cause investigations when required
- Maintain equipment performanceAct as Tool Responsible for assigned equipment and process areas (e.g. chemistry area, laser lithography)
- Perform routine inspections, calibrations, and equipment qualification checks
- Execute first-level preventive maintenance and support corrective maintenance activities
- Manage consumables and ensure equipment operational readiness
- Contribute to operational excellenceParticipate in continuous improvement initiatives to increase throughput, equipment availability, and process robustness
- Contribute to the development and improvement of operating procedures
- Work closely with Process Engineering, Process Integration, and Test/Characterization teams to support technology development and production ramp-up
Requirements
Education and experience
- Bachelor's degree (or equivalent) in Physics, Materials Science, Chemistry, Microelectronics, or another relevant technical discipline.
- At least 3–5 years of experience in semiconductor, microfabrication, or nanofabrication environments.
- Hands-on experience operating cleanroom process equipment.
Technical Skills
- Experience working in ISO cleanroom environments.
- Strong practical skills and attention to detail.
- Ability to follow and execute standardized operating procedures with rigor.
- Ability to interpret technical documentation and equipment manuals.
- Experience with equipment maintenance or troubleshooting is a strong plus.
Personal skills
- Strong sense of ownership and accountability.
- Team player with excellent communication skills.
- Organized, rigorous, and quality-oriented.
- Curious, proactive, and committed to continuous improvement.
- Comfortable working in a dynamic, fast-growing environment.
- Professional proficiency in English.
Nice to have
- A strong curiosity and openness to new ideas
- Research skills (going through existing literature, testing new methods)
- Team player mindset
Recruitment process
- Screening Call with Alexandra, Talent Acquisition Specialist (30 min)
- Hiring Manager Interview (45 min)
- Technical Interview/Presentation with the team (60 min)
- Leadership Interview (30 min)
- Fit Interview (30 min)
- Reference Check
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Benefits:
- Our success is your success: own it with our BSPCE plan
- Direct IP Compensation: Earn substantial bonuses for driving the core patents that define our quantum architecture.
- A Parental plan including additional benefits such as crèche support or additional days-off to take care of under 12 years old children
- Subsidized membership withUrban Sports Club
- Mental health support with moka.care
- 25-day vacation policy (as per French law) + RTT
- Half of transportation cost coverage (as per French law), or yearly allowance for the die-hard bicycle users
- Competitive health coverage, with Alan.
- Meal vouchers with Swile, as well as access to a fully equipped and regularly stocked kitchen
- French language courses covered by the company for those interested
Research shows that women might feel hesitant to apply for this job if they don't match 100% of the job requirements listed. This list is a guide, and we'd love to receive your application even if you think you're only a partial match. We are looking to build teams that innovate, not just tick boxes on a job spec.
You will join of one of the most innovative startups in France at an early stage, to be part of a passionate and friendly team on its mission to build the first universal quantum computer!
We love to share and learn from one another, so you will be certain to innovate, develop new ideas, and have the space to grow.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The emergence of specialized Nanofabrication Process Technicians represents a critical convergence point between industrial-grade semiconductor manufacturing standards and high-fidelity quantum hardware prototyping. As the quantum computing value chain transitions through intermediate Technology Readiness Levels, the structural requirement for roles that translate abstract sub-micron layouts into physically stable, reproducible superconducting circuits becomes a primary determinant of yield predictability. This function addresses a systemic bottleneck within cleanroom operations by decoupling active technology development from the rigorous maintenance of process baselines. By securing deterministic machine environments and running precise lithographic, deposition, and etching protocols, these specialists directly influence the structural integrity of qubits before macroscopic system integration. Consequently, this role category functions as a critical yield-stabilization mechanism within deep-tech hardware clusters, directly impacting the commercial timeline for fault-tolerant physical processors.
Within the hardware and physical infrastructure layer of the quantum value chain, the primary constraint on commercial scalability is shifting from theoretical qubit configuration to the yield mechanics of wafer-scale chip manufacturing. While classical foundries enjoy highly automated, predictable production pipelines, the fabrication of advanced superconducting architectures remains sensitive to slight variations in substrate preparation, material contamination, and thin-film uniformity. This delicate state places a premium on highly disciplined cleanroom operations capable of maintaining strict statistical process control across both research cycles and repeatable pilot runs.
Ecosystem-level assessments indicate that the intersection of traditional microelectronics manufacturing discipline and quantum-native material parameters is a sector-wide area of workforce scarcity. The evolution of next-generation physical processors relies on the continuous optimization of tool availability and process stability, particularly within maskless lithography, electron-beam processing, and automated metrology areas. Because minor deviations in a single process step can destroy macroscopic quantum coherence across an entire wafer, the stabilization of tool parameters is a fundamental prerequisite for scaling up physical qubit counts.
Furthermore, current deep-tech funding cycles and national infrastructure strategies increasingly prioritize regional foundry partnerships and shared cleanroom facilities to mitigate high capital dependencies. As these ecosystems mature, maintaining standardized operating procedures and rigorous physical traceability metrics ensures that experimental yields can be reliably benchmarked across software-hardware interfaces. This operational foundation reduces translation friction between geometric design variations and active hardware testing pipelines.
The capability architecture for this role type centers on the synchronization of advanced semiconductor manufacturing equipment operations with high-precision metrology workflows. Mastery of sub-micron pattern generation, chemical surface processing, and physical vapor deposition systems is essential to ensure that physical qubit structures achieve the exact structural dimensions necessary for autonomous error correction. This requires an analytical framework grounded in thin-film physics, microfluidic handling, and standard cleanroom discipline to isolate environmental variables during production runs.
These capability domains are fundamental to increasing cleanroom throughput, as they allow for the rapid parallelization of multiple wafer designs alongside the standard maintenance of tool calibration matrixes. By coupling inline process characterization metrics, such as reflectometry and profilometry data, with digital execution databases, this function establishes a reliable traceability architecture. This cross-functional linkage provides process integration and test engineering teams with the deterministic data structure required to isolate physical fabrication anomalies from algorithmic performance limits. - Accelerates the deterministic translation of sub-micron wafer designs into reproducible superconducting quantum processing units
- Reduces process-induced defect densities by enforcing rigorous contamination controls and standardized operating procedures within ISO cleanroom environments
- Optimizes tool availability matrices through the execution of systematic first-level preventive maintenance and equipment qualifications
- Mitigates fabrication-level execution risks by logging and analyzing real-time process data against strict statistical baselines
- Decreases cycle times for experimental hardware variants by establishing highly predictable baselines for rapid cleanroom prototyping
- Enhances cross-functional data integrity by coupling physical metrology outputs directly with design integration verification frameworks
- Stabilizes thin-film deposition uniformity across multi-project wafers to preserve downstream qubit coherence and gate performance
- Curtails capital-intensive material waste through the precise management of specialized cleanroom consumables and chemical parameters
- Fortifies the hardware supply chain by providing verifiable traceability reports for every processing layer on a wafer
- Shortens root-cause investigation cycles for process deviations by identifying in-line mechanical and environmental anomalies early
- Maximizes cleanroom operational excellence by developing and refining high-fidelity technical documentation for complex tooling layers
- Supports the reliable scaling of manufacturing pipelines by maintaining equipment readiness for cross-functional technology ramp-upsIndustry Tags: Quantum Hardware Fabrication, Cleanroom Operations, Superconducting Qubits, Semiconductor Manufacturing, Maskless Lithography, Process Quality Engineering, Microelectronics Yield, Thin Film Metrology, Deep Tech Infrastructure
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