Founded in 2020 and based in the heart of Paris, C12’s mission is to be at the center of one of the biggest technological breakthroughs of the century and change the course of history by building a universal quantum computer.
At C12, we believe that achieving a true breakthrough in quantum computing requires rethinking the fundamentals. That’s why our founders—deeply rooted in academic and engineering excellence—have chosen carbon nanotubes as the building blocks of our quantum processors. This ultra-pure material dramatically reduces error rates, boosts performance, and minimizes hardware overhead—key ingredients for scalable, fault-tolerant quantum computing. By crafting a unique approach that scales, we aim to revolutionize quantum computing just as silicon transformed classical computing.
Since our founding, we’ve raised over €25 million in funding, published 11 scientific papers, and secured 8 patents. Today, our fast-growing team of 80+, including 25 PhDs, has over 26 nationalities represented. We have our own cutting-edge lab spaces in Paris' historic Panthéon district, where scientists, engineers, and innovators work side-by-side to tackle some of the most exciting technical challenges of our time.
If you're passionate about shaping the future of quantum technology and want to make a real impact, C12 offers a unique environment to grow, learn, and innovate.
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Your role at C12 Quantum Electronics:
As a Process Integration Engineer, you will play a central role in transforming C12's quantum hardware development from research-driven workflows into robust, measurable and repeatable engineering processes capable of supporting future product generations.
Working across R&D and engineering teams, you will identify the factors driving performance and variability, define meaningful process metrics, drive process improvements and establish the foundations required for future validation, manufacturability and industrialization.
This role sits at the frontier between research and engineering, where process understanding, measurement strategy, and engineering rigor become critical enablers of future quantum hardware products.
Key responsibilities:
- Own the maturation of the engineering processes supporting C12's quantum hardware roadmap, ensuring that process capability evolves alongside the technology itself and remains compatible with future generations of quantum hardware
- Develop and maintain a deep understanding of C12's end-to-end quantum hardware development processes, capturing critical knowledge, process flows, dependencies, assumptions and risk factors
- Work directly with R&D and engineering teams to characterize processes, collect and analyze data, investigate failures, drive process improvements across fabrication, assembly, integration and characterization activities
- Ensure process assumptions, dependencies, risks, and maturity gaps are visible and integrated into engineering and program decisions
- Identify process limitations, scalability bottlenecks, and opportunities for standardization, automation, process control, and future industrialization. Evaluate which processes should be strengthened, adapted, or reimagined to support future generations of quantum hardware
About you:
- You have a MSc or PhD in Engineering, Physics, Materials Science, Nanotechnology, Semiconductor Processing, or a related technical field
- You are a strong communicator, able to build trust across disciplines and influence technical decisions through data analysis and collaboration.
- You are comfortable working with emerging technologies where process understanding, measurement strategies and engineering practices are still being developed
- You have experience in semiconductor process development, process integration, device fabrication, advanced assembly or experimental hardware development
- You have experience defining process metrics, analyzing variability, improving yield or repeatability, and supporting root-cause investigations
- You have exposure to hardware characterization, test strategy, validation, reliability or process qualification activities.
- Experience across several of the following fields is a strong plus: nanotechnology, nanoassembly, quantum hardware, cryogenic systems, MEMS, photonics, advanced instrumentation or other complex hardware environments
- Programming or scripting experience for data analysis, process monitoring or automation such as Python or Matlab, is a plus
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What we offer:
- 55,000 euros - 62,000 euros yearly base salary
- Stock options for every employee (BSPCE/ESOP)
- Sponsored trip to conferences around the world
- A highly dynamic international team
- Swile meal vouchers
- Mental health support with moka.care
- Training budget/ Annual Learning & Development Allowance
- Sabbatical leave (after 2 years in the company)
- Vibrant office culture (two office spaces in the heart of Paris, team lunches, offsite events, Friday breakfasts..)
You should join us if...
- You like hands-on work and technology
- You want to contribute to achieving landmark results in quantum computing, making a difference in the emerging quantum technologies
- You want to work within a team of 80+ people with various backgrounds in nanofabrication, quantum electronics, and carbon nanotube science to create a revolutionary quantum computing processor
- You want to thrive in an exceptional scientific environment with several industrial and academic partners
- You share our values (excellence, scientific integrity, diversity, curiosity, and care) and want to help us define our product-focused culture and ambition to accelerate
We still encourage even if you don’t meet all the requirements. Rest assured, we are committed to finding the right fit for our team and are open to adjusting compensations based on skills and experiences.
Applications from women are especially welcomed!
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The emergence of Process Integration Engineers specializing in quantum hardware represents a critical pivot in the deep-tech sector from laboratory-scale prototyping to predictable, industrial manufacturing. As the quantum ecosystem matures, the structural necessity for roles that bridge abstract physical research and reproducible engineering becomes paramount to resolving the translation gap between proof-of-concept qubits and commercial utility. This function serves as a high-leverage stabilization point within the physical enablement layer, ensuring that emerging processors are architecturally compatible with future industrial validation. Market signals from global deep-tech consortia and national technology strategies highlight that this process optimization is essential for mitigating systemic manufacturing risks. By converting complex nanomaterial handling into deterministic fabrication workflows, this role secures the foundation for scalable, fault-tolerant architectures and long-term sector readiness.
The quantum hardware landscape is undergoing a decisive shift from uncalibrated experimental workflows to the implementation of high-yield manufacturing metrics. While hardware development continues to progress across diverse material modalities, the primary bottleneck for industrial scalability has shifted to process variability and the reproducibility of physical components. The current industry focus lies on bridging classical and quantum capabilities at scale, necessitating sophisticated management of the hardware-engineering interface to ensure that advanced fabrication pipelines can handle the yield requirements of future computer generations.
Workforce scarcity is particularly acute at the intersection of traditional semiconductor processing and non-traditional quantum material integration. As organizations move toward deeper Technology Readiness Levels, the ecosystem requires specialized engineers who can navigate the lack of standardized benchmarking and qualification protocols. Current industry dynamics, influenced by public-private funding cycles and supply chain vulnerabilities, place a premium on roles that can drive process maturity across disparate fabrication and assembly steps. This engineering layer is the primary mechanism for maintaining structural momentum across the value chain.
Integration with established cleanroom infrastructures and advanced packaging remains a high-risk dependency for the deep-tech sector. The evolution of the hardware value chain depends on the ability to translate novel material sciences into scalable device architectures without disrupting standard processing principles. Consequently, the availability of engineers capable of orchestrating these complex cross-functional dependencies is a primary determinant of whether a commercial hardware developer can successfully transition from exploratory research to reliable product manufacturing.
The capability architecture for this role type centers on the synchronization of material science research with the protocols of precision systems engineering. Mastery of the hardware-enabling process layer is essential for ensuring that device fabrications are optimized for the specific geometric and structural constraints of next-generation quantum processors. This requires a deep understanding of the integration points between microfabrication activities and data-driven process monitoring strategies that manage variability.
These engineering capabilities are fundamental to the throughput of hardware organizations, as they enable the parallelization of basic research alongside the development of repeatable validation frameworks. By establishing rigorous verification, failure analysis, and data loops, this function provides the leverage needed to assess the true stability of quantum components before full-scale capital allocation. Such expertise reduces iteration friction between fundamental physics breakthroughs and physical delivery, which is critical for long-term interoperability within the emerging deep-tech market. - Accelerates the deterministic transition from laboratory-scale quantum prototyping to industrial-grade hardware manufacturing
- Mitigates systemic fabrication risks by synchronizing long-term research cycles with reproducible engineering roadmaps
- Facilitates the integration of advanced nanomaterials into standardized microfabrication and packaging infrastructures
- Strengthens the reliability of hardware development strategies through the implementation of rigorous process benchmarking
- Reduces iteration friction between fundamental material science breakthroughs and the deployment of scalable processors
- Optimizes the allocation of specialized technical talent across research, engineering, and manufacturing portfolios
- Enhances the stability of the physical value chain by providing predictable requirement frameworks for external suppliers
- Supports the scaling of processor capabilities by managing the complex dependencies of multi-step assembly workflows
- Improves the transparency of technology readiness level progression for stakeholders in the deep-tech investment sector
- Enables the structural reproducibility of hardware experiments through the standardization of integration protocols
- Protects high-capital research and development investments by ensuring alignment between scientific discovery and manufacturability
- Orchestrates the convergence of academic nanotechnology pathways with the practical demands of global enterprise-ready systemsIndustry Tags: Quantum Hardware, Process Integration, Carbon Nanotubes, Microfabrication, Yield Optimization, Deep Tech Engineering, Technology Readiness Levels, Scalable Electronics
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