About Quandela:
Quandela is a European deeptech scale-up building modular, scalable and energy-efficient photonic quantum computers.
With more than 140 people, we develop our own hardware technologies — from single-photon sources to photonic integrated circuits (PICs) — and make them accessible via cloud and on-premise systems.
At the core of our processors are Photonic Integrated Circuits (PICs): compact optical chips that route and manipulate single photons to perform quantum operations at scale.
About this position:
You will join the Integrated Photonics team in Massy, composed of senior engineers, PhDs, and research interns working across design, characterization, and packaging of our PICs.
The team owns the full design cycle of our photonic circuits — from simulation and layout to foundry collaboration and performance feedback. Fabrication is outsourced, but simulation depth, architectural choices, and design-for-manufacturing decisions are fully internal.
You will design and optimize key building blocks of our PIC platform, translating system requirements into robust and manufacturable layouts that support the evolution of our processors. Working closely with characterization, you will iteratively refine your designs based on fabrication variability and experimental feedback.
The coming year is strongly design-driven, with a focus on improving robustness against fabrication variability, increasing integration density, and preparing architectural evolutions for future scalable quantum processors.
Why this role matters:
What you design today directly shapes the scalability, stability, and performance of tomorrow’s photonic quantum processors.
Your work directly impacts how efficiently our circuits scale, how resilient they remain under fabrication variability, and how quickly research concepts become reliable hardware.
As Quandela grows, this role helps shape not only components, but also the design methodologies and standards that will support larger-scale and fault-tolerant quantum architectures.
What will you do?
Design and simulate photonic components
• Perform electromagnetic and thermal simulations (Lumerical required; Tidy3D or similar is a plus)
• Analyze trade-offs between loss, footprint, fabrication tolerance, and performance
• Design and optimize waveguides, interferometers, beam splitters, phase shifters, and reconfigurable elements
• Contribute to next-generation components, including high-speed and new-material integrations
Translate simulations into manufacturable layouts
• Generate mask layouts using GDS-based tools
• Prepare designs for tape-out with external foundries
• Ensure designs remain compatible with real fabrication constraints
Collaborate with characterization
• Analyze measured data against simulations and identify performance gaps
• Refine models and layouts based on fabrication and experimental feedback
• Contribute to continuous performance improvements
How you’ll grow?
0/3 months → Understand our simulation environment and reproduce existing component designs.
3–6 months → Lead a full simulation-to-layout cycle on a defined component.
6–12 months → Contribute to design improvements and take part in next-generation component development, supporting the transition toward higher-speed reconfiguration regimes and tighter performance constraints.
Longer term → Take ownership of architectural blocks or contribute to defining structured design methodologies as our PIC platform evolves toward larger and fault-tolerant systems.
What we’re looking for:
Must-have:
• Master’s or PhD in Photonics, Physics, Electronic Engineering or related field
• Hands-on experience in PIC simulation (Lumerical strongly preferred)
• Experience translating simulations into manufacturable layouts using GDS-based tools (GDSFactory, IPKISS, KLayout, or similar)
• Understanding of integrated photonics fundamentals (waveguide physics, interferometers, beam splitters and phase control mechanisms)
• Ability to reason at circuit level, beyond individual components
• Professional English
Important (can grow here):
• Experience closing the loop between simulation and experimental results
• Familiarity with fabrication constraints and design-for-manufacturing logic
• Python for automation, scripting or data analysis
• Interest in scalable or quantum hardware architectures (quantum knowledge is a plus, not a prerequisite)
Bonus:
• Experience in industrial PIC platforms or foundry-driven environment
• Exposure to high-speed photonic components or cryogenic constraints
• Familiarity with inverse design and particle swarm optimization
We welcome strong PhD profiles as well as engineers with a few years of experience.
What matters most is simulation autonomy, strong physical intuition, and the ability to turn models into robust devices while thinking at system scale.
Benefits
Indicative salary range:
• €53–58K gross — Intermediate profile (recent or near-completion PhD, or 2–3 years of PIC design experience with solid simulation autonomy and layout experience)
• €58–65K gross - experienced profile (3–5+ years of PIC design experience, able to own larger design blocks and contribute to methodology and architectural decisions)
Perks: annual profit-sharing • company savings plan • 100% health coverage (Alan) • transport reimbursement or mobility bonus • Swile meal vouchers • Gymlib access.
