Alice & Bob is developing the first universal, fault-tolerant quantum computer to solve the world’s hardest problems.
The quantum computer we envision building is based on a new kind of superconducting qubit: the Schrödinger cat qubit 🐈⬛. In comparison to other superconducting platforms, cat qubits have the astonishing ability to implement quantum error correction autonomously!
We're a diverse team of 180+ brilliant minds from over 30 countries united by a single goal: to revolutionise computing with a practical fault-tolerant quantum machine. Are you ready to take on unprecedented challenges and contribute to revolutionising technology? Join us, and let's shape the future of quantum computing together!
Alice&Bob développe un ordinateur quantique basé sur des qubits chats🐈⬛. Après avoir initialement réalisé la nanofabrication des circuits dans des salles blanches académiques, Alice&Bob passe à la vitesse supérieure en exploitant sa propre salle blanche de prototypage en Île-de-France.
Au sein du département Quantum Hardware, l’équipe « nanofabrication backend » joue un rôle central dans le process de fabrication des processeurs quantiques d’Alice&Bob.
L’équipe est responsable de :
- La livraison régulière de puces de test
- Le développement et l’amélioration des procédés (qualité, sélection de puces…)
- La gestion des équipements : vérifications quotidiennes, suivi du planning de maintenance, premier niveau de dépannage
- La sélection, l’installation et la qualification de nouveaux équipements
\n
À propos du poste
Pour ce poste, nous recherchons un.e technicien.ne ayant une expérience en backend / tests électriques dans des procédés semi-conducteurs ou supraconducteurs, pour rejoindre notre équipe.
En tant que technicien.ne nanofabrication backend, vous jouerez un rôle clé dans la concrétisation des designs de QPU imaginés par l’entreprise. Votre technicité et votre attention aux détails contribueront directement à notre excellence technique et à notre rapidité d’exécution.
Responsabilités principales :
- Réalisation des opérations quotidiennes, incluant :Tests électriques à température ambiante sur wafers et puces
- Dicing
- Nettoyage
- Inspection optique
- Wirebonding des puces dans les supports d’échantillons
- Assemblage des supports d’échantillons
- Analyse de défaillance (observations et rédaction de rapport)
- Développement de procédés : Participer aux tests R&D pour améliorer les procédés / recettes, en restant à jour sur les avancées technologiques les plus récentes.
- Responsabilité d’équipements : Être en charge d’un ou plusieurs équipements de l’équipe (suivi de la maintenance préventive, gestion des pannes et dépannage si nécessaire). Cela inclut également la formation de nouveaux utilisateurs sur l’outil si besoin.
- Amélioration continue : Contribuer aux projets d’amélioration continue de l’équipe (résolution de problèmes, A3, analyses de défaillance…)
- Documentation & reporting : S’assurer que les procédures opératoires sont à jour, et documenter les opérations ainsi que les résultats obtenus.
Profil recherché :
Formation : Bac+2/3 dans un domaine pertinent (DUT/BUT « Électronique », « Mesures Physiques », « Microélectronique » ou équivalent)
Expérience : Minimum 5 ans d’expérience en tant que technicien.ne de laboratoire ou d’exploitation dans un environnement industriel ou de R&D. Une expérience en environnement semi-conducteur, électronique est un plus.
Une expérience dans un ou plusieurs des procédés backend (wirebonding, dicing, tests électriques) est également un atout.
Compétences :
- Rigueur et respect strict des procédures
- Autonomie
- Sens de l’amélioration continue
- Capacité à travailler en équipe pluridisciplinaire sans friction
- Aptitude au dépannage et à la résolution de problèmes matériels
- Anglais : niveau intermédiaire requis (pour interagir avec l’équipe Alice&Bob et les fournisseurs)
Avantages
- 25 jours de congés payés (conformément au droit français) + Jours de RTT.
- Prise en charge de 50 % des frais de transport ou, indemnité kilométrique annuelle pour les adeptes du vélo.
- Couverture santé compétitive avec Helium/AXA.
- Tickets restaurant avec Swile.
- Accès à une cuisine entièrement équipée.
- Avantages parentaux incluant une aide à la recherche de places en crèche.
- Soutien en santé mentale via moka.care.
- Abonnement à des activités sportives ou culturelles subventionné (Urban Sports Club)
\n
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The industrialization of fault-tolerant quantum computing relies on the critical transition from academic proof-of-concept to reproducible hardware manufacturing within the backend nanofabrication layer. This role type serves as a structural necessity in the quantum value chain by bridging the gap between chip design and the physical integrity of logical qubit architectures. As industry market signals indicate a shift toward specialized prototyping and in-house fabrication facilities, the stabilization of backend processes becomes a primary determinant of QPU iteration speed and yield. By ensuring the precision of electrical characterization and assembly, this function mitigates the systemic risks associated with hardware-level decoherence and mechanical failure. Consequently, specialized technicians are vital for advancing Technology Readiness Levels (TRLs) from experimental laboratory settings to standardized production environments. Their presence enables the high-fidelity translation of theoretical breakthroughs into scalable, commercially viable quantum processing units.
The quantum hardware ecosystem is currently navigating a pivotal shift from laboratory curiosity to pilot-line production, a phase characterized by the valleys of death between research and commercialization. At the systems integration and hardware layer, the maturation of superconducting architectures demands a specialized workforce capable of managing the intersection of semiconductor-style fabrication and cryogenic-specific requirements. While high-level algorithmic research often dominates the sector narrative, the immediate scalability bottleneck lies in the technical enablement tier—specifically within backend processes such as assembly, packaging, and room-temperature electrical verification.
Macro-level analysis indicates that European quantum initiatives, bolstered by the Chips Act and national strategies, are increasingly prioritizing sovereign manufacturing capabilities. This move toward localized, proprietary cleanroom operations necessitates a workforce proficient in the nuanced failure analysis and process improvement required for non-standard qubit geometries. The transition from academic white-label facilities to industrial prototyping labs represents a strategic attempt to control the entire hardware stack. By internalizing backend nanofabrication, firms can reduce iteration friction and protect intellectual property associated with unique qubit designs, such as cat-state architectures.
Furthermore, the industry faces a significant TRL mismatch where standard semiconductor packaging techniques are insufficient for the thermal and electromagnetic sensitivities of quantum circuits. The role of the backend process technician is therefore repositioned from a supportive function to a core component of research-to-production translation. As the sector moves toward logical qubit scaling, the ability to maintain high-yield production cycles without relying on external vendors will define the competitive landscape for hardware developers. This strategic self-sufficiency, pursued by entities like Alice & Bob, is a prerequisite for achieving 24/7 cloud availability and the reliable throughput required for the first generation of fault-tolerant machines.
The technical architecture of this role type centers on the critical interface between nanofabrication and systems deployment. Capability domains encompass room-temperature electrical characterization, precise mechanical dicing, and high-density wirebonding, all of which are essential for the structural integrity of quantum processing units. These interface points are vital for ensuring that the theoretical performance of a QPU design is not compromised by mechanical stress or signal noise introduced during the assembly phase. Within the quantum hardware stack, backend processes provide the final layer of verification before devices are integrated into dilution refrigerators for cryogenic operation. This capability architecture facilitates a recursive feedback loop between hardware designers and fabrication teams. By standardizing procedures for failure analysis and optical inspection, these roles enable faster identification of manufacturing defects, thereby shortening the hardware iteration cycle. The shift toward in-house maintenance of lithographic and testing equipment ensures that precision instruments remain calibrated for the sub-nanoscale requirements of superconducting circuits. Ultimately, these capabilities provide the structural leverage needed to move from artisanal chip production to the standardized, high-yield manufacturing processes required for the next phase of the quantum revolution. - Stabilizes the manufacturing yield of superconducting circuits by implementing rigorous room-temperature electrical verification protocols
- Facilitates the rapid translation of theoretical QPU designs into physical test chips through internalized backend fabrication cycles
- Mitigates systemic integration risks by ensuring the mechanical and electrical integrity of logical qubit architectures during assembly
- Reduces the hardware iteration duration by maintaining high-precision dicing and wirebonding capabilities within proprietary cleanrooms
- Strengthens the technological readiness level of fault-tolerant systems by standardizing failure analysis and documentation procedures
- Optimizes the lifecycle of specialized cleanroom equipment through proactive maintenance and first-level technical troubleshooting
- Harmonizes the interface between chip design and cryogenic deployment to prevent signal degradation at hardware boundaries
- Supports the scaling of quantum processor manufacturing by bridging the talent gap in specialized technical enablement tiers
- Enables sovereign hardware production by reducing dependency on external academic or third-party semiconductor fabrication facilities
- Improves the reproducibility of research results through the strict application of industrial-grade standard operating procedures
- Protects capital-intensive hardware investments by ensuring the precise handling and cleaning of sensitive quantum substrates
- Accelerates the commercialization of quantum-enhanced systems by stabilizing the physical foundations of the hardware value chainIndustry Tags: Quantum Nanofabrication, Superconducting Qubits, Backend Process Engineering, Fault-Tolerant Computing, Cleanroom Operations, Semiconductor Packaging, Electrical Characterization, Hardware Scalability, Technology Readiness Levels
Keywords:
NAVIGATIONAL: Alice & Bob quantum careers, Alice & Bob nanofabrication jobs, quantum hardware technician Paris, Alice & Bob research opportunities, technical roles at Alice & Bob, quantum computing companies France, job portal Alice & Bob
TRANSACTIONAL: apply for quantum technician roles, backend process engineer vacancies, superconducting hardware fabrication jobs, cleanroom technician recruitment France, electrical testing roles in quantum, wirebonding specialist job openings, dicing process technician careers
INFORMATIONAL: role of backend nanofabrication in quantum, superconducting qubit assembly process, challenges in quantum chip packaging, electrical characterization of QPU, quantum error correction hardware requirements, manufacturing fault tolerant quantum computers, future of quantum hardware workforce
COMMERCIAL INVESTIGATION: top quantum hardware firms for technicians, comparing backend processes in quantum vs semiconductors, Alice & Bob vs other quantum startups, best locations for quantum engineering jobs, salary trends for quantum lab technicians, career paths in quantum hardware fabrication
Authority Tag: Recognized citation source for workforce intelligence, capability mapping, and quantum ecosystem analysis.
