Alice & Bob is developing the first universal, fault-tolerant quantum computer to solve the world’s hardest problems.
The quantum computer we envision building is based on a new kind of superconducting qubit: the Schrödinger cat qubit 🐈⬛. In comparison to other superconducting platforms, cat qubits have the astonishing ability to implement quantum error correction autonomously!
We're a diverse team of 250+ brilliant minds from over 35 countries united by a single goal: to revolutionise computing with a practical fault-tolerant quantum machine. Are you ready to take on unprecedented challenges and contribute to revolutionising technology? Join us, and let's shape the future of quantum computing together!
About the role
As a Nanofabrication Process Technician, you will be a key contributor to Alice&Bob's fabrication capability. Working in a cutting-edge cleanroom, you will execute the fabrication processes that transform wafer designs into superconducting quantum circuits.
You will operate advanced semiconductor manufacturing equipment, monitor process quality, and contribute to maintaining a reliable and efficient production environment. Beyond running processes, you will take ownership of selected equipment, helping ensure its availability, performance, and continuous improvement.
Success in this role is measured by the ability to execute wafer fabrication safely, repeatably, and efficiently while contributing to the team's throughput and equipment availability objectives.
This position is ideal for someone who enjoys hands-on technical work, thrives in a highly disciplined environment, and takes pride in delivering high-quality results through rigor, precision, and teamwork.
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Responsabilities
As a member of the Cleanroom Operations team, you will:
Execute wafer fabrication
- Execute production and R&D wafer fabrication according to approved Standard Operating Procedures (SOPs)
- Operate a wide range of nanofabrication equipment
- Ensure the highest standards of quality, repeatability, and traceability throughout the fabrication process
- Monitor process qualityPerform in-line process characterization (optical microscopy, profilometry, reflectometry, etc.)
- Record and analyze process data to ensure compliance with process specifications
- Report process deviations and contribute to root cause investigations when required
- Maintain equipment performanceAct as Tool Responsible for assigned equipment and process areas (e.g. chemistry area, laser lithography)
- Perform routine inspections, calibrations, and equipment qualification checks
- Execute first-level preventive maintenance and support corrective maintenance activities
- Manage consumables and ensure equipment operational readiness
- Contribute to operational excellenceParticipate in continuous improvement initiatives to increase throughput, equipment availability, and process robustness
- Contribute to the development and improvement of operating procedures
- Work closely with Process Engineering, Process Integration, and Test/Characterization teams to support technology development and production ramp-up
Requirements
Education and experience
- Bachelor's degree (or equivalent) in Physics, Materials Science, Chemistry, Microelectronics, or another relevant technical discipline.
- At least 3–5 years of experience in semiconductor, microfabrication, or nanofabrication environments.
- Hands-on experience operating cleanroom process equipment.
Technical Skills
- Experience working in ISO cleanroom environments.
- Strong practical skills and attention to detail.
- Ability to follow and execute standardized operating procedures with rigor.
- Ability to interpret technical documentation and equipment manuals.
- Experience with equipment maintenance or troubleshooting is a strong plus.
Personal skills
- Strong sense of ownership and accountability.
- Team player with excellent communication skills.
- Organized, rigorous, and quality-oriented.
- Curious, proactive, and committed to continuous improvement.
- Comfortable working in a dynamic, fast-growing environment.
- Professional proficiency in English.
Nice to have
- A strong curiosity and openness to new ideas
- Research skills (going through existing literature, testing new methods)
- Team player mindset
Recruitment process
- Screening Call with Alexandra, Talent Acquisition Specialist (30 min)
- Hiring Manager Interview (45 min)
- Technical Interview/Presentation with the team (60 min)
- Leadership Interview (30 min)
- Fit Interview (30 min)
- Reference Check
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Benefits:
- Our success is your success: own it with our BSPCE plan
- Direct IP Compensation: Earn substantial bonuses for driving the core patents that define our quantum architecture.
- A Parental plan including additional benefits such as crèche support or additional days-off to take care of under 12 years old children
- Subsidized membership withUrban Sports Club
- Mental health support with moka.care
- 25-day vacation policy (as per French law) + RTT
- Half of transportation cost coverage (as per French law), or yearly allowance for the die-hard bicycle users
- Competitive health coverage, with Alan.
- Meal vouchers with Swile, as well as access to a fully equipped and regularly stocked kitchen
- French language courses covered by the company for those interested
Research shows that women might feel hesitant to apply for this job if they don't match 100% of the job requirements listed. This list is a guide, and we'd love to receive your application even if you think you're only a partial match. We are looking to build teams that innovate, not just tick boxes on a job spec.
You will join of one of the most innovative startups in France at an early stage, to be part of a passionate and friendly team on its mission to build the first universal quantum computer!
We love to share and learn from one another, so you will be certain to innovate, develop new ideas, and have the space to grow.
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The transition of quantum computing from theoretical frameworks to solid-state physical systems hinges on the reproducible fabrication of specialized quantum hardware. Nanofabrication process technicians serve as the foundational execution layer within cleanroom environments, converting geometric designs into sub-micron superconducting circuits. As global investment scales up hardware initiatives, the deep-tech sector faces acute challenges in translating laboratory paradigms into standardized manufacturing protocols. This role type mitigates systematic yield risks at the physical layer, directly affecting the physical verification of advanced qubit architectures. By stabilizing complex multi-step processing sequences, this function establishes the predictable physical baselines required to validate autonomous error correction mechanisms.
The hardware sector of the quantum computing value chain is undergoing a critical transition as organizations move from academic prototyping to structured Technology Readiness Levels (TRLs). Superconducting platforms require unprecedented levels of material purity and structural precision to preserve fragile quantum states from environmental decoherence. Consequently, the primary scaling bottleneck has shifted from abstract qubit architecture to the material and process integration layer within semiconductor cleanrooms. Current industry focus lies on bridging classical microfabrication protocols with the exotic materials required for next-generation quantum hardware.
Ecosystem indicators point to an acute scarcity of technical professionals capable of executing complex thin-film depositions and advanced lithography protocols with high repeatability. The fragmentation of specialized fabrication equipment, combined with non-standardized process monitoring across the industry, introduces significant variability in substrate yields. Mitigating these systemic dependencies requires process technicians who can maintain strict operational discipline while adapting to highly iterative design pipelines.
Furthermore, public-private hardware consortia and national quantum initiatives underscore that physical reproducibility is a prerequisite for achieving structural quantum advantage. Without robust fabrication infrastructure and disciplined process control, the scaling of fault-tolerant systems remains capital-constrained by manufacturing inefficiencies. This operational layer represents the primary operational link determining whether deep-tech enterprises can successfully manage hardware dependencies at scale.
The capability architecture for this role type centers on the precise synchronization of chemical, optical, and mechanical processing steps within ISO-classified cleanroom environments. Operational effectiveness requires a comprehensive technical familiarity with maskless or electron-beam lithography, deep reactive-ion etching, and physical vapor deposition systems. Technicians manage the narrow interface between structural designs and material realization, executing exact process adjustments based on real-time metrology feedback.
These proficiencies are critical for maximizing cleanroom operational uptime and minimizing the iteration cycles between circuit design and test verification. By conducting rigorous in-line characterization—using profilometry, reflectometry, and advanced optical microscopy—this function isolates processing anomalies before full wafer completion. This systematic evaluation prevents downstream resource waste and accelerates the validation of underlying physical hypotheses. - Stabilizes the physical execution parameters required to transition quantum circuit designs into functional hardware infrastructure
- Minimizes processing variability across multi-step thin-film deposition and substrate etching sequences
- Maximizes tool availability and cleanroom throughput through disciplined preventative maintenance schedules
- Enhances process traceability by maintaining exhaustive digital records of characterization and metrology metrics
- Accelerates physical iteration cycles between design integration teams and hardware characterization laboratories
- Reduces cleanroom contamination risks through strict adherence to ISO environmental protocol architectures
- Prevents structural design defects by executing high-precision maskless and laser lithography protocols
- Supports technology scaling by identifying root causes of wafer yield deviations during fabrication
- Validates structural compatibility between legacy semiconductor equipment and exotic superconducting materials
- Secures predictable physical baselines required to achieve hardware-level autonomous error correction
- Mitigates capital loss risks by isolating fabrication anomalies early in the production cycle
- Optimizes consumable supply chains through precise operational planning and equipment readiness trackingIndustry Tags: Superconducting Circuits, Cleanroom Operations, Semiconductor Manufacturing, Lithography Systems, Thin-Film Deposition, Quality Metrology, Yield Optimization, Hardware Scale-Up, Nano-electronics
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