Founded in 2020 and based in the heart of Paris, C12’s mission is to be at the center of one of the biggest technological breakthroughs of the century and change the course of history by building a universal quantum computer.
At C12, we believe that achieving a true breakthrough in quantum computing requires rethinking the fundamentals. That’s why our founders—deeply rooted in academic and engineering excellence—have chosen carbon nanotubes as the building blocks of our quantum processors. This ultra-pure material dramatically reduces error rates, boosts performance, and minimizes hardware overhead—key ingredients for scalable, fault-tolerant quantum computing. By crafting a unique approach that scales, we aim to revolutionize quantum computing just as silicon transformed classical computing.
Since our founding, we’ve raised over €25 million in funding, published 11 scientific papers, and secured 8 patents. Today, our fast-growing team of 80+, including 25 PhDs, has over 26 nationalities represented. We have our own cutting-edge lab spaces in Paris' historic Panthéon district, where scientists, engineers, and innovators work side-by-side to tackle some of the most exciting technical challenges of our time.
If you're passionate about shaping the future of quantum technology and want to make a real impact, C12 offers a unique environment to grow, learn, and innovate.
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Your role at C12 Quantum Electronics:
As Theory Lead at C12, you are expected to lead and coordinate the Theory & Applications team across three main areas:
- Hardware Modeling
- Quantum Error Correction
- Quantum Algorithms for Industrial Applications
Key responsibilities:
- You will define and drive the company’s theory roadmap, leveraging the expertise of team members to align with hardware development, business priorities and industrial quantum advantage opportunities
- You will strengthen the company’s error correction strategy, from quantum error correction code benchmarking to implementation and fault-tolerance roadmap
- You will drive co-design efforts between hardware and theory teams, working closely with domain experts to define scalable quantum computing architectures and long-term scalability strategies
- You will recruit, mentor and structure the theory team as the company grows
- You will establish collaborations with academia and research partners, and contribute to the scientific visibility and positioning of the company within the quantum ecosystem
- You will prioritize research directions and resources by balancing scientific ambition, hardware feasibility and business impact, while building consensus across technical experts
About you:
- You have a strong background in quantum computing with expertise in either:
- Quantum Error Correction
- Quantum Algorithms
- You have a broad understanding of the quantum computing stack and ability to engage effectively with experts across theory and hardware domains
- You have an architecture-level understanding of scalable quantum computing and fault-tolerant strategies
- You have demonstrated scientific leadership, with the ability to articulate a vision, align experts and drive execution
- You have an ability to connect theoretical developments with experimental and hardware constraints
- Experience leading or mentoring research teams is highly appreciated
- Experience working in startups or fast-pace private-sector environments is highly appreciated
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What we offer:
- 92,000 euros to 108,000 euros yearly base salary
- Stock options for every employee (BSPCE/ESOP)
- Sponsored trip to conferences around the world
- A highly dynamic international team
- Swile meal vouchers
- Mental health support with moka.care
- Training budget/ Annual Learning & Development Allowance
- Sabbatical leave (after 2 years in the company)
- Vibrant office culture (two office spaces in the heart of Paris, team lunches, offsite events, Friday breakfasts..)
You should join us if...
- You like hands-on work and technology
- You want to contribute to achieving landmark results in quantum computing, making a difference in the emerging quantum technologies
- You want to work within a team of 80+ people with various backgrounds in nanofabrication, quantum electronics, and carbon nanotube science to create a revolutionary quantum computing processor
- You want to thrive in an exceptional scientific environment with several industrial and academic partners
- You share our values (excellence, scientific integrity, diversity, curiosity, and care) and want to help us define our product-focused culture and ambition to accelerate
We still encourage even if you don’t meet all the requirements. Rest assured, we are committed to finding the right fit for our team and are open to adjusting compensations based on skills and experiences.
Applications from women are especially welcomed!
TECHNICAL & MARKET ANALYSIS | Appended by Quantum.Jobs
The emergence of specialized theoretical leadership functions represents a critical transition in the quantum hardware sector from physical qubit demonstration to scalable architecture co-design.
As early quantum processing units encounter complex error mechanisms and physical constraints, structured theoretical modeling becomes essential for bridging abstract physics with practical hardware manufacturing.
This leadership role type functions as a high-leverage optimization point within the quantum ecosystem, ensuring that hardware developmental strategies align directly with error correction and algorithmic viability.
Market indicators from major quantum consortia and national investment strategies highlight that coordinating multi-disciplinary research tracks is a key determinant of commercial viability.
By translating quantum mechanics insights into deterministic hardware roadmaps, this function addresses the systemic execution risks of scalability in deep tech frameworks.
Consequently, establishing rigorous theoretical leadership secures the foundational framework necessary for long-term algorithmic execution and market readiness.
Current industry focus lies on bridging classical and quantum capabilities at scale. Within the broader quantum value chain, the software and algorithmic layers are transitioning from isolated academic exercises to integrated structural components of physical systems. This evolution requires intense co-design where hardware topologies and theoretical error correction mechanisms are optimized simultaneously. The principal challenge facing deep-tech entities is the translation gap between physical qubit error rates and the stringent requirements of fault-tolerant quantum computing frameworks.
Ecosystem growth remains constrained by the acute fragmentation of hardware modalities and the lack of standardized benchmarking frameworks. While public funding cycles and national technology strategies have successfully catalyzed initial infrastructure deployments, private sector scaling requires a shift toward predictable, high-fidelity operations. This shifting paradigm places an operational premium on roles that can contextualize physical noise sources, such as charge fluctuations or materials imperfections, into macroscopic architecture roadmaps.
Furthermore, the global quantum talent pipeline shows structural imbalances, with a severe shortage of specialists capable of operating across the hardware-software interface. As venture rounds give way to rigorous milestone-driven evaluations, organizations must maintain momentum through precise resource allocation. Resolving these multi-layered execution risks is crucial for transitioning deep-tech platforms through varying technology readiness levels toward definitive industrial application enablement. By establishing clear methodologies for theoretical evaluation, companies minimize the risk of hardware obsolescence. This structural leadership ensures that long-term research translates directly into commercial utility within the global market.
The capability architecture for this role type centers on the synchronization of advanced quantum information theory with practical hardware engineering constraints. Mastery of quantum error correction scheme design, including code mapping and fault-tolerance benchmarking, is essential for defining the operational boundaries of next-generation processors. This requires a deep understanding of the interactions between high-level algorithmic execution and the physical substrate noise models, enabling the development of predictive hardware simulation frameworks.
These capabilities are fundamental to the throughput of deep-tech organizations, as they enable the parallelization of hardware development alongside the optimization of software compilation pipelines. By establishing rigorous verification and validation metrics, this function provides the analytical leverage needed to assess performance trade-offs before physical manufacturing. Such expertise dramatically reduces iteration friction between abstract theoretical breakthroughs and scalable systems engineering, ensuring that emerging processors are optimized for industrial applications. Ultimately, this expertise mitigates the systemic risks associated with scaling novel physical materials into robust, enterprise-ready computational architectures. - Accelerates the transition from theoretical quantum research to scalable physical hardware architectures
- Mitigates architectural execution risks by aligning theory roadmaps with physical manufacturing constraints
- Facilitates the development of optimized quantum error correction protocols for novel processor modalities
- Strengthens the reliability of institutional technology roadmaps through rigorous algorithmic benchmarking
- Reduces iteration friction between fundamental quantum physics discoveries and systems engineering teams
- Optimizes the allocation of specialized computational resources across multi-disciplinary research groups
- Enhances the structural predictability of hardware scaling strategies through advanced noise modeling
- Supports the evaluation of industrial quantum advantage opportunities across diverse commercial sectors
- Improves the alignment of co-design efforts between hardware fabrication and software development
- Enables the systematic expansion of scientific collaboration networks with global academic partners
- Protects substantial capital investments by verifying architectural feasibility prior to production
- Orchestrates the convergence of quantum information theory with enterprise-grade deployment requirementsIndustry Tags: Quantum Computing, Quantum Error Correction, Hardware Co-Design, Quantum Information Theory, Deep Tech Strategy, Algorithmic Benchmarking, Fault-Tolerant Architecture, Quantum Simulations
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